Wow. Yeah. I'm thinking about it now. I'll come up with a schematic and discuss with you. Please wait.I thought you knew how the 4046 works... pin 14 is for a low level AC input signal
if you dont understand how to design this, how are you expected to find a solution?
IF you dont have a counter do you know how to calibrate VCO precisely to 1%?
To make the automated circuit you imagine... think of block diagrams then and specify all inputs and outputs.
- VCO: 0-Vcc input, 5:1 freq range output, 300R output (internal ) impedance
- Low impedance Driver: for 5 Ohm load.
- driver to 0.5Ohm parallel resonator with 5 Ohm current sense to ground.
- Precision rectifier Op Amp for resonant peak signal. Vp
- Negative sweep integrator sample and hold circuit for V_ctrl
- 1 shot cct to dump Cap voltage to Vcc with MOSFET switch to restart sweep.
- Sample and hold cct #2 for peak signal. (low leakage switch & low leakage Film cap)
- Comparator between V(t) - V(t-1) between S&H#2 cap and rectifier out , +Ve out if signal > Hold voltage to resample during pulse .. logic level out.
- ! shot timer to stop test if resample pulse has not occurred within 1 ms and hold V_Ctrl
- then use control limits or look up table for Vctrl before it drifts. for V vs F
- Or use cheap counter circuit with VCO direct to Crystal input pin with small series cap.
Okay. I'll use the comparator 2 (PC2). 33074 worked well last time.PC1 is a harmonic mixer. (XOR), thus time delay LPF causes cycle skips near resonance which causes errors.
PC2 is a P/F mixer and modulates between 2.5 and 5V for lag and 0 to 2.5V for lead ( or visa versa) so is better to use.
33074 Op Amp draws 0.5uA which into 0.1uF results in a drift of dV/dt=I/C= 0.5V/s and you need to read voltage within 15mV.
I am using CSM150/200 , total 10 caps of 5 parallel pair of caps (of 2 caps in series).Did you get ESR of Coil and Cap yet?
You can not hold the 0.1 uF Cap with that Op Amp due to input bias current.
WHen you define the time duration the leakage current * C defines the droop rate.
Is cost and qty significant here? HOw many? what's it worth?
What about using an Arduino?
The best solution comes from detailed requirements.
not low power.Now I was looking at the CD4046.
I used two frequency generators and plugged one to pin 14 and other to 3 and tried to understand phase 2 comparator (pin 13, since I had used phase 1 comparator only in the past). When I change frequency through pin 14 (sq wave), output through 13 changes the same way. So, If 14 is a current feedback, output 13 would be aligned as frequency of feedback will change. Will it sweep through the range that I define? How can I hold the value of max. current and signal that this is the resonant freq?
I am planning to use 120V AC input now, convert it to DC and then AC again (sweeping frequency).
Does it seem doable?
I was thinking along the same lines. I don't if you made it clear that the Comparator input to the phase detector II should be the tank voltage, limited to CMOS levels, and the Signal input to phase comparator II should be the current sense line, amplified and limited to CMOS levels (using a comparator). I don't think any sort of sweep is needed. The loop should settle on the resonant frequency, provided the Q is sufficient, and there is no phase inversion of voltage relative to current in the limiters.not low power.
Read how PC2 works. It is a tri-state pump up down phase/freq detector so a small cap C is needed or RC/C lag;/lead filter. to charge up. Adjust impedance to control PLL capture time, jitter, PC2 out sag voltage. between pulses....
View attachment 94329
You don't need high voltage, but you do need reasonably high current (100mA) to energize the tank circuit at 0.5 Ω more or less. Thus using a complementary MOSFET to drive the Tank circuit for maximum voltage at 0.5 Ohm max and rolls off below this away from center. Thus your driver can apply low voltage even as low as 1V but needs to be much lower impedance than 0.5 e.g. 10mΩ Nch/Pch with logic level Gate voltage may work as long as you don't have shoot thru (Vcc short) during transitions by care selection of MOSFETS using 5V drive level.
PLL Signal input should be your tank signal going into a precision limiter with with maybe <1% positive feedback for hysteresis and high gain but logic level out.
No input signal causes PC2 to go to 0V or minimum frequency after VCO filter. Note the PC2 load circuit for PC2 to modulate as I indicated before. Vcc/2 to Vcc for phase lead and 0 to Vcc/2 for phase lag.
When both rising edges are in sync for Sig and Ref ( from VCO, PC2 is in tristate mode.
Thus you can possibly sweep the VCO and if done right should lock onto resonant frequency where phase shift is 0 deg for a parallel tank circuit. and lead /lag otherwise.
Make sense yet?
The limiter from your tank output is critical as is your PC2 output filter and VCO setup. 5V should be adequate for PLL , preferably 3.7 from a LiPo. battery to reach 150kHz.
You need a good driver for the VCO to the tank and you might consider complementary darlington emitter followers from 3.7V to drive 0.5mA in and get maybe 100~ 500mA out which will be 0.25V maybe at resonance, which into a good limiter with 1mV resolution should resolve the small signal to drive the PLL input if you AC couple to minimize input offsets.
If you get it to lock on, then you have succeeded in the hard part.
The easy part is a counter display to count VCO output pulses in 10ms 50kHz = 500 pulses or 2% resolution using BCD counters and BCD decoders to 7 seg display. or 4 digits using 100ms count gate. 150kHz * 100ms = 15000 count needs 5 digits but you can use decimal point for over flow.(1)
I was thinking along the same lines. I don't if you made it clear that the Comparator input to the phase detector II should be the tank voltage, limited to CMOS levels, and the Signal input to phase comparator II should be the current sense line, amplified and limited to CMOS levels (using a comparator). I don't think any sort of sweep is needed. The loop should settle on the resonant frequency, provided the Q is sufficient, and there is no phase inversion of voltage relative to current in the limiters.
Here's a block diagram.
You still need a frequency counter. You can build or buy one fairly inexpensively.
View attachment 94342
Thank you Tony Stewart and Roff for a detailed suggestion. I had decided to go with a current feedback too. Now the tank is fed through a 120Vac, which goes through a rectifier and then an inverter (so the power is going is going to be higher now). The output of the CD4046 would fire the IGBTs. I have built the power supply for now. I am working on the gate circuits to fire the IGBT modules.not low power.
Read how PC2 works. It is a tri-state pump up down phase/freq detector so a small cap C is needed or RC/C lag;/lead filter. to charge up. Adjust impedance to control PLL capture time, jitter, PC2 out sag voltage. between pulses....
View attachment 94329
You don't need high voltage, but you do need reasonably high current (100mA) to energize the tank circuit at 0.5 Ω more or less. Thus using a complementary MOSFET to drive the Tank circuit for maximum voltage at 0.5 Ohm max and rolls off below this away from center. Thus your driver can apply low voltage even as low as 1V but needs to be much lower impedance than 0.5 e.g. 10mΩ Nch/Pch with logic level Gate voltage may work as long as you don't have shoot thru (Vcc short) during transitions by care selection of MOSFETS using 5V drive level.
PLL Signal input should be your tank signal going into a precision limiter with with maybe <1% positive feedback for hysteresis and high gain but logic level out.
No input signal causes PC2 to go to 0V or minimum frequency after VCO filter. Note the PC2 load circuit for PC2 to modulate as I indicated before. Vcc/2 to Vcc for phase lead and 0 to Vcc/2 for phase lag.
When both rising edges are in sync for Sig and Ref ( from VCO, PC2 is in tristate mode.
Thus you can possibly sweep the VCO and if done right should lock onto resonant frequency where phase shift is 0 deg for a parallel tank circuit. and lead /lag otherwise.
Make sense yet?
The limiter from your tank output is critical as is your PC2 output filter and VCO setup. 5V should be adequate for PLL , preferably 3.7 from a LiPo. battery to reach 150kHz.
You need a good driver for the VCO to the tank and you might consider complementary darlington emitter followers from 3.7V to drive 0.5mA in and get maybe 100~ 500mA out which will be 0.25V maybe at resonance, which into a good limiter with 1mV resolution should resolve the small signal to drive the PLL input if you AC couple to minimize input offsets.
If you get it to lock on, then you have succeeded in the hard part.
The easy part is a counter display to count VCO output pulses in 10ms 50kHz = 500 pulses or 2% resolution using BCD counters and BCD decoders to 7 seg display. or 4 digits using 100ms count gate. 150kHz * 100ms = 15000 count needs 5 digits but you can use decimal point for over flow.(1)
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