entity BlinkLed is
Port ( LED_01 : out STD_LOGIC;
OSC_IN : in STD_LOGIC;
RESET : in STD_LOGIC);
end BlinkLed;
architecture Behavioral of BlinkLed is
signal state : std_logic;
begin
process(OSC_IN, RESET) is begin
if(RESET = '1') then
state <= '0';
elsif(rising_edge(OSC_IN)) then
state <= not state;
end if;
end process;
LED_01 <= state;
end Behavioral;
Ok i know im posting alot here but figured out i can implement a internal signal to use instead of the actual pin. This way i can leave it as OUT and not INOUT and also not have to process it:
Im sure i can also use BIT instead of STD_LOGIC but heh its ok i assume
Ah ok heh..Good job! ( had you coded in verilog, it would have worked fine as an output )
You can, but "bit" is generally used in non-synthisized code. For synthesis, stick with STD_LOGIC.
entity shift32 is
Port ( sin : in STD_LOGIC;
lat : in STD_LOGIC;
clk : in STD_LOGIC;
rst : in STD_LOGIC;
db : out STD_LOGIC_VECTOR (31 downto 0));
end shift32;
architecture Behavioral of shift32 is
signal tempReg : STD_LOGIC_VECTOR (31 downto 0);
shared variable cnt : integer;
begin
process (clk,lat,rst,sin,tempReg)
begin
if(rst = '1') then
for i in 0 to 31 loop
tempReg(i) <= '0';
end loop;
cnt := 0;
elsif(rising_edge(clk)) then
if(sin='1') then
tempReg(cnt) <= '1';
else
tempReg(cnt) <= '0';
end if;
cnt := cnt + 1;
if(cnt = 32) then
cnt := 0;
end if;
if(lat = '1') then
db <= tempReg;
end if;
end if;
end process;
end Behavioral;
If you make cnt a 5 bit STD_LOGIC_VECTOR,it will roll over by itself. -- Awesome idea! But how would i ? Do i make it a signal ? or can i do that with variables... im still waiting on a certain book to arrive to read
SO you meant 6 bits
Also :
Code:ERROR:HDLParsers:821 - "C:/XWD/Shift32/shift32.vhd" Line 58. Wrong index type for tempReg. --.. on code tempReg(cnt) <= sin;
signal shifter : STD_LOGIC_VECTOR(MAX_LED-1 downto 0);
...
if(clk_cnter(CNT_MAX) = '1' and clk_cntr_d = '0') then
if(dir = '0') then
shifter <= '0' & shifter(MAX_LED-1 downto 1); -- right shift
else
shifter <= shifter(MAX_LED-2 downto 0) & '0'; -- left shift
end if;
etc...
INTERNAL_ERROR:Xst:cmain.c:3464:1.56 - Process will terminate. For technical support on this issue, please open a WebCase with this project attached at http://www.xilinx.com/support.
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
-----------------------------------------------------
entity BlinkRate is
port( myButton: in std_logic;
myClock: in std_logic;
myReset: in std_logic;
myLED: out std_logic
);
end BlinkRate;
-----------------------------------------------------
architecture myFSM of BlinkRate is
-- states of myFSM
signal myLEDState : STD_LOGIC;
type state_type is (S0, S1, S2, S3);
signal next_state, current_state: state_type;
shared variable myRate: integer;
shared variable myCount: integer; -- shared variable cnt : integer;
begin
-- cocurrent process#1: state registers
state_reg: process(myClock, myReset)
begin
if (myReset='1') then
myLEDState <= '0';
myRate := 32000000;
myCount := 0;
current_state <= S0;
elsif (myClock'event and myClock='1') then
current_state <= next_state;
if(myCount=myRate) then
myLEDState <= not myLEDState;
myCount := 0;
else
myCount :=myCount + 1;
end if;
end if;
myLED <= myLEDState;
end process;
-- cocurrent process#2: combinational logic
comb_logic: process(current_state, myButton)
begin
case current_state is
when S0 =>
if myButton='0' then
next_state <= S0;
else
myRate := 16000000;
next_state <= S1;
end if;
when S1 =>
if myButton='0' then
next_state <= S1;
else
myRate := 8000000;
next_state <= S2;
end if;
when S2 =>
if myButton='0' then
next_state <= S2;
else
myRate := 4000000;
next_state <= S3;
end if;
when S3 =>
if myButton='0' then
next_state <= S3;
else
myRate := 32000000;
next_state <= S0;
end if;
when others =>
myRate := 32000000;
next_state <= S0;
end case;
end process;
end myFSM;
signal counter : STD_LOGIC_VECTOR(24 downto 0)
....
case current_state
...
when s0 -> LED_STATE <= counter(24)
...
when s1 -> LED_STATE <= counter(23)
etc.
how would i set the entire signal value ?
do i simply... counter <= 30842; or something
when s0 -> LED_STATE <= counter(24)
i think im tired and will tackle this tomorrow.. if i said something stupid here omit thatim just very sleepy
myRate <= "1111010000100100000000000";
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