Fpga

[AtomSoft]

OK im not a professional. Im a hobbiest. I dont have a solution to SOLVE i want to do this for fun. I dont mind learning something new. Like i said before its not only about tutorials. If i have to develop my own peripherals then so be it but i would learn a great deal more by studying something that is proven already.

 

[RichTheDude]

It does not bother me, glad to see people becoming interested in FPGA development .

Check out the Mico32 from lattice, it's an open source 32 bit micro - https://www.latticesemi.com/products/intellectualproperty/ipcores/mico32/index.cfm

 

[AtomSoft]

Now thats cool! Imagine a Custom 32bit MCU with tons of I/O pins... I like the fact that if i need 2 UARTS i can simply add it and if i need no i2c i can remove it

 

[Sceadwian]

I think you'll love them AtomSoft... Just beware, the programming considerations as have been mentioned are an order of magnitude different from simple instructions on a micro controller.

 

[AtomSoft]

Yeah thats half the fun, not only will blinking a led be harder i can say i did it from pure logic

Im watching som Xilinx training videos

 

[AtomSoft]

Im about to go through a tutorial for Xilinx... its a stopwatch... has some inputs, outputs and a Char LCD so will learn a ton i assume

 

[AtomSoft]

Their tutorial SUCKS so many problems just following it .. they make so many mistakes... files not showing up... have to find it manually, then typos telling me to erase stuff thats needed

 

[AtomSoft]

This seems simpler:
**broken link removed**

this board looks great!
http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,799&Prod=S3BOARD

 

[RichTheDude]

I think learning the language from the ground up will really help. Programming in HDL is far far different to C for a micro. Some things will happen concurrently, where as other things will only happen on a clock edge (and lots of things can happen concurrently on the clock edge too)

I would suggest these

**broken link removed**
https://electrosofts.com/vhdl/
https://www.google.co.uk/url?sa=t&s...BVCT4LyOw&sig2=_qFHzHfJ-oW04Fankp64CA&cad=rja

The link you have provided is quite good too, but I think it would be good to know the language a bit

 

[AtomSoft]

Thanks a ton i love links especially recommended links from a friend

Ill check them out in a minute

 

[RichTheDude]

The first link is the best IMHO, it's a crash course on VHDL itself.

Also in FPGA design when we design a module to do a certain job we usually make a test bench for it too (FPGA design would be pretty much impossible without test benches and the simulator!). All this really is, is another VHDL file which drives our module with pretend data. We can then look at the waveforms our module produces from these inputs and determine if our code is doing the job we expect. You can even write fancy test benches which do the inspection for you so to speak (i usually do not bother with this, but depends on the complexity of the design).

I think being able to write VHDL (or verilog) and test benches for simple circuits like gates (AND, half adders etc) and basic sequential circuits (like shift registers, pattern detectors, counters etc) will put you in good stead for doing more complex projects.

This site and Xilinx ISE and it's simulator (ISIM) would prove a great hands on way of learning too . Really good site with example code and test benches, upto state machines and starting with gates.

 

[AtomSoft]

So you prefer VHDL to VERILOG? VHDL seems better to me mainly becuase the name it has HDL in it ..

Test bench sounds cool!

 

[RichTheDude]

I only know VHDL so VHDL is my favourite only for that reason haha . It's a general stereotype that US companies and hobbyists tend to use Verilog, and European companies and hobbyists tend to use VHDL. But that is only a stereotype...

A lot of people argue what's best, but not knowing Verilog I will not comment...

 

[BrownOut]

Verilog is easier to learn. Most of the structure is similar to "C". VHDL has much more capability, and can be used to build intricate testbenches. But verilog is totally capable, and what I mostly use.

I'd start with verilog, and 'graduate' to VHDL.

 

[AtomSoft]

Heh ill stick to VHDL, this site rocks.... .

Thanks

 

[AtomSoft]

This is pretty cool. I mean i only tested out a OR gate so far in code but seems nifty! i love the sim so far. I havent went crazy enough to make a test bench type thing but i can force a line to clock to get some cool accurate results

I now know what the entity is for and architecture part is for. Also you can simply "define" (not sure if its good to use this word) an Entity and reuse it if needed

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;

-- Uncomment the following library declaration if instantiating
-- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity testVHDL is
    Port ( x : in  STD_LOGIC;
			  y : in  STD_LOGIC;
           F : out  STD_LOGIC);
end testVHDL;

architecture Behavioral of testVHDL is

begin

	process(x,y)
	begin
		-- Compare to truth table
		if ((x='0') and (y='0')) then
			F <= '0';
		else
			F <= '1';
		end if;
	end process;
	
end Behavioral;

 

[AtomSoft]

Im not going to LIE there is a ton to learn but it wouldnt be a achievement in my books if it wasnt hard to do

I like being known for learning things and understanding... basically being smart. Its a good feeling being able to help other people... and seeing a shock on peoples faces when they get amazed at something you created.

 

[RichTheDude]

I must admit, getting respectable at FPGA design has been the hardest thing I have done in electronics - but it does open a lot more design doors - a lot more things can be done with FPGA's than MCU's (I have a few open source things I am planning to release, including a hardware platform).

I tend to create modules, and then instantiate them from a parent file (https://www.doulos.com/knowhow/vhdl_designers_guide/components_and_port_maps/) so I typically have a top level VHDL file (whose entity actually hooks up to real IO pins), which instantiates all the other modules. Some people use libraries, but I have long forgot how to do that

Hope you have fun and do some cool FPGA projects

 

[AtomSoft]

That site is cool also. Read from history to that page and so far tons of info. I think i understand it better now. Seems very useful since you can seperate modules and just create a instance when needed.

 

[AtomSoft]

its pretty tough to learn with no hardware tho... i need something concrete to feel and get me in the mood