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Yes, but in post 19 you said you modified the circuit and now it has only half the transistors it used to. Are we supposed to guess how it is connected now?
R2 sure does change the gain, but not of the first stage. First stage - the first opamp - is a unity gain follower loaded by R2. R2 introduces current into the supply rails, which are then mirrored to current through R1, so at the input of the second opamp I think you should have gain of R2/R1=10. Now R3/R1 adds another gain of 10.
Anyway, why are you using such convoluted configuration and are trying to minize offest, when you at the same time use discrete unmatched transistors that will throw in all kinds of offset and temperature dependence?
Instead of 4 discrete unmatched transistors I used transistor arrays that have same transistors. first of all I don't understand why and how does R2 introduces current to the supply rails? Second of all why do we have the gain of R2/R1 at the input of second op amp?
Ok, so lets look at the first stage. If the voltage on the output of the opamp is 1V, then the current through R2 will be 100uA. Where does this current come from? It is going from the positive supply rail, through the current mirror, into the positive supply pin of the opamp and through the output out into R2.
The opamp needs some supply current to work, lets say this current is 1mA. This current will flow through both the upper and the lower mirror, so the current through the top mirror should be 1mA + 100uA, and the current through the bottom mirror should be 1mA. The difference in those two currents needs to flow through R1 because those two ends of the mirrors are connected together and you cant have 1.1mA and 1mA flowing through at the same time, so there will be 100uA flowing through R1, which will produce 0.1V at the point R1 connects to those two mirros.
Now, the second opamp needs to provide -100uA into R3 to keep the input of the opamp at 0V. 100uA*R3 is 1V, so I was wrong in the last post. The frist opamp has gain of 1, the current mirror produces gain of 0.1 and the third opamp has gain of -10, resulting in overall gain of -1.
I still dont see how you came up with such a circuit, or why are you trying to actually use it. I don´t see any benefit over using just the opamps, this circuit is just much worse in real life.
I really appreciate ur help. I don't understand one part, why should the current of top mirror be 1mA+100uA and the current of bottom mirror must be 1 mA?
Ok, so lets look at the first stage. If the voltage on the output of the opamp is 1V, then the current through R2 will be 100uA. Where does this current come from? It is going from the positive supply rail, through the current mirror, into the positive supply pin of the opamp and through the output out into R2.
The opamp needs some supply current to work, lets say this current is 1mA. This current will flow through both the upper and the lower mirror, so the current through the top mirror should be 1mA + 100uA, and the current through the bottom mirror should be 1mA. The difference in those two currents needs to flow through R1 because those two ends of the mirrors are connected together and you cant have 1.1mA and 1mA flowing through at the same time, so there will be 100uA flowing through R1, which will produce 0.1V at the point R1 connects to those two mirros.
Now, the second opamp needs to provide -100uA into R3 to keep the input of the opamp at 0V. 100uA*R3 is 1V, so I was wrong in the last post. The frist opamp has gain of 1, the current mirror produces gain of 0.1 and the third opamp has gain of -10, resulting in overall gain of -1.
I still dont see how you came up with such a circuit, or why are you trying to actually use it. I don´t see any benefit over using just the opamps, this circuit is just much worse in real life.
One more thing, You said "so there will be 100uA flowing through R1, which will produce 0.1V at the point R1 connects to those two mirros." You mean 0.1v will be produced at the connection of R1 and R3, right?
I see your new circuit too now, a little less complicated so that is nice.
When i say the "gain of the first stage" i mean the first "stage" is the first op amp PLUS the transistors. That's the first stage because the op amp is not alone but has transistors that 'monitor' the supply currents and produce a like current in the output. So the output of the first stage appears through R1.
Given that the transistors produce a current as the first op amp supplies output as a current through R2, the differential current is the current through R2. The current through R2 then appears through R1, so the gain of the first stage (A1) is actually:
A1=R1/R2
Since R1=1k and R2=10k, the gain is 1/10 or 0.1 and that's strange. The gain of the second stage is 10 so the overall gain of the circuit is 1, which is also strange.
Power amplifiers sometimes use the op amp supply currents as a drive signal for the output transistors, but this circuit is not the same. This makes me have to ask again, why the extra transistors, what advantage is that supposed to bring? Normally if you are going to add four transistors to a circuit you would have a very good reason for doing so. It's ok if you just want to "try" this but if you had a better reason that would be good to mention now so we know what you are trying to achieve here.
This circuit has been given to me. I should analyze it and assemble on breadboard to see what's going on. this circuit is one part of the main circuit but I'm told I have to
analyze this part first. I try to upload the file of whole circuit very soon. it's not clear to me why is this current mirror used! I have one question when we want to get gain of first stage the output voltage is end of the resistor (R3)? it seems strange to me gain of first stage is R1/R2.
I really appreciate ur help. I don't understand one part, why should the current of top mirror be 1mA+100uA and the current of bottom mirror must be 1 mA?
One more thing, You said "so there will be 100uA flowing through R1, which will produce 0.1V at the point R1 connects to those two mirros." You mean 0.1v will be produced at the connection of R1 and R3, right?
This circuit has been given to me. I should analyze it and assemble on breadboard to see what's going on. this circuit is one part of the main circuit but I'm told I have to
analyze this part first. I try to upload the file of whole circuit very soon. it's not clear to me why is this current mirror used! I have one question when we want to get gain of first stage the output voltage is end of the resistor (R3)? it seems strange to me gain of first stage is R1/R2.
We would all like to know why the current mirrors are being used. It could be as simple as extending the usable output voltage range (because it will do that), but i dont want to guess at this point what the original designer had in mind.
To clarify again, when i say the first stage i mean both the first op amp on the left and the (now) four transistors. The output of the first stage then appears across R1 because the right side of R1 is at virtual ground, and virtual ground is very close to zero volts.
As i am sure you know, a current mirror takes an input current of some level and outputs a current at that same level in the output branch. The two current mirrors are connected to the supply lines of the left op amp, so they mirror the positive supply current and negative supply current. Since their output junctions are connected together and to R1 that has the other end connected to virtual ground, the current through R1 is the difference in currents that the op amp draws from the positive and negative supply rails. So if the op amp draws 1.1ma from the positive supply rail and the op amp draws 1ma from the negative supply rail then the current through R1 is the difference 1.1ma-1.0ma which equals 100ua. So the current through R1 is:
iR1=Ip-In
where Ip is the positive rail current and In is the negative supply rail current.
Now when the left op amp has zero input, there is zero output (assuming zero offset for now). Zero output voltage produced zero current in R2, so the positive rail current is the same as the negative supply rail current which would be the quiescent current draw of the op amp. If this was 1ma then that would appear in both rails, so iR1=0 also.
When a positive voltage is applied to the left op amp, the output goes higher by the same amount. So for 1v input the output of the left op amp goes to 1v also. This produces a current equal to:
Iout1=Vout1/R2
This current must come from the positive rail, so now the positive rail current is higher than the negative rail current so we get a net output current from the two current mirrors of:
iR1=Ip-In
and since the current in R2 is now 1/10000=100ua we have iR1=100ua also.
We could now state the transconductance of the first stage, which would be:
gm=100ua/1v=0.0001/1=100uS
but it's also a simple matter to state the voltage output of the first stage because the current iR1 produces a voltage Vout1=iR1*R1 so the voltage is:
Vout1=Vin/R2*R1
so the voltage gain of the first stage is:
Vout1/Vin=R1/R2
The second stage (the right side op amp) has a gain R3/R1, so the overall voltage gain of the whole circuit is:
Av=(R1/R2)*(R3/R1)=R3/R2
We might be able to call the two current mirrors used that way a "Norton Amplifier" because it works on the input difference of two currents rather than the difference of two voltages, for what it is worth. More strictly speaking though we could probably call the two current mirrors combined with the output op amp stage a Norton Amplifier because it takes the difference of two input currents and amplifies that difference into a voltage output. We could look into this more.
Don't forget that most op-amp simulation models incorrectly model the power-supply current , especially the load current is not model properly.
And this is why this circuit will not work in simulation.
Good point Jony. Some probably model the quiescent current with a simple resistor from positive supply to negative supply. If not, one can be added externally.
I have one basic question. I want to simulate an op amp with negative feedback in pspice, I don't know I should connect negative voltage source to pin 11 for example(-15) or a positive voltage source(15) to this point , I guess I have to apply negative voltage source to port 4 because this pin is labeled (V-) but I 'm not totally sure! please answer my question :-(
You should look at the datasheet for the TL084 quad opamp. It shows the positive supply of +3.5V to +18V at pin 4 and the negative supply of -3.5V to -18V at pin 11.
Your schematic #3 shows two positive supplies instead of a negative supply at pin 11.
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