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Battery circuit why these two mosfets

newbe_always

New Member
The below schematic is taken from this TI reference design. May I know is there any reason for using 2 MOSFETs here.
Hi this link contains the application of the product.This is a Wireless PIR Motion Detector.Here is the design guide.

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Reverse blocking ? This example is NMOS, but principles apply -


But your circuit not back to back, error ?
 
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May I know any relation with this.

Back in the day, before inexpensive EEPROM memory was widely available, the configuration settings were stored in static RAM. And they were kept powered during the main power-off periods via non-rechargeable lithium cells.

As the article you linked mentioned, UL were very paranoid about a schottky diode failure causing current flowing back into the cell, which could potentially cause a fire. Thus a redundant diode was employed. This caused a double diode drop on an already low (compared to 5V) battery voltage. We would have loved to use a P-channel Mosfet instead, but in those days there were no suitable devices for this purpose.

Fortunately static RAM consumption at idle was below minuscule, and the actual schottky forward drop each was a tad above 100 mV, and the circuit would be backed up by a significant amount of time.

However, for the circuit that you show, the coin cell appears to be the primary supply, and therefore two Mosfets in series doesn’t make sense.
 
So the orientation of MOSFET is wrong in the TI reference design
That's only if the MOSFETs are connected to some type of controller.
It makes no sense when their gates are both connected to ground since, if they are back-to-back, they won't conduct in either direction.
 

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