Why Opamp with potentiometer?

[MrAl]

Hi,

You do not need to label BOTH input sources, only one, because they are both exactly the same as to amplitude and phase, at least for the CM gain calculation. So say you label the source of the non inverting input A1, then label the very output of the last stage A2. Then you can calculate the CM gain by using V(A2)/V(A1)).

Next, you need to recreate the ENTIRE circuit, that means ALL op amps and resistors and current mirrors, but this time make the second input source equal to something else like zero, label the non inverting input of that circuit A3, and label the output of that circuit A4. Now the differential gain can be calculated by V(A4)/V(A3).

Next, the CMRR is (V(A4)/V(A3)/(V(A2)/V(A1)), which is also equal to (V(A1)*V(A4))/(V(A2)*V(A3), and if A1 and A3 are the same (which they very well can and should be made to be) then this reduces to:
V(A4)/V(A3).

So the CMRR is the ratio of those two outputs.

The only hard part is you have to copy the entire circuit including all parts to do it this way, but you can probably use copy and paste. With the two input amps, two buffer amps, four current mirrors, and one output amp per circuit, that means the double circuit will take 10 op amps and 8 current mirrors as well as all the resistors.

It will be hard to say though how well this calculation or any calculation of the CMRR using spice models will relate to the real life circuit.

 

[sagh]

I told you in previous post I did lable the input and output as you said. but after running, in graph display I had V(a2) and Acm was -157db untill 100khz then it went down. I also changed V(a2) to V(a2)/V(a1). but I had the same result (-157db) again. if you got the correct result that's ok. I think something is wrong in my simulator or schematic.

 

[sagh]

I have another concern about this circuit. I breadboarded the whole circuit and did some changes on the resistors of last stage the pairs of 100k were converted to 10k s and 10k resistors were changed to 1k s. I haven't test this change in real world. but in LTspice, In transient time analysis this kind of change has singular matrix error I don't know why?

 

[MrAl]

Hi again,

I'll have to look at the resistor change problem.
Later:
I changed my resistors to 1k and 10k as you said, but the sim ran just fine. I did however get a totally different result for the CM gain, which game out now to about -159db over the entire frequency range, changing by only a small amount like 0.1db or so. I'll have to check and see if this is valid.

For the other 'problem', i'll post my results in a few minutes to this post and we can compare.
Later:
As you can see from this, the CM gain (solid line) changes from about -158db to about -95db from 10Hz to 100kHz. This was with the original 10k and 100k resistors on the last stage op amp.

UPDATE:
I found that using 1k resistors in place of the 10k resistors on the last stage op amp does not work for some reason even though my simulation converges. I dont know the reason for this yet. When i use 1k and 10k i get bogus results, but when i use 2k and 20k for example i get good results. Perhaps 1k is too much of a load on the output stage of the LM358 model being used here. That limits us to 2k or something.
I get slightly different CMGain results with the 2k and 20k too, but not too much different than with 10k and 100k.

 

[sagh]

If you do transient analysis with 2k and 20k. You get the error. it's interesting you do AC analysis and don't have any error while I have in transient simulation.

 

[sagh]

For the other 'problem', i'll post my results in a few minutes to this post and we can compare.
Later:
As you can see from this, the CM gain (solid line) changes from about -158db to about -95db from 10Hz to 100kHz. This was with the original 10k and 100k resistors on the last stage op amp.

Please post .asc file when you can. I have to find why there is so much difference between my result and yours.

 

[MrAl]

Hello,

Here is the .asc file. Note that for the calculation of the CM gain i do V(A2)/V(a1).

Also note that you can not do the division for transient analysis, but you can look at the very output of the last stage in trans.

 

[sagh]

It's so interesting. with your .asc file I got different result. something is wrong in my simulator. How can we have 2 different results with one .asc file?!!

 

[MrAl]

Hi,

Well what else is strange is that is the same file you posted, i just changed some of the part values and maybe moved one around a little.

Maybe you moved something or changed a part and didnt quite enter the value right, that's my only guess. I really cant say for sure without being there to see what you have. Maybe you didnt label the nodes right? As long as you have it working now though that's good.

 

[sagh]

The result that you got from your .asc file shown in post number 204 is a little strange to me. before we use your approach(placing lable in one of inputs and at the very last output) I used abs(V(n018))/abs(V(n008))-abs(V(n010)) that is the magnitude of inputs. In this case common mode gain was zero volt which seems reasonable.
while The common mode gain that you calculated isn't zero. why? you input two voltage sources with the same amplitude and the same phase.

 

[MrAl]

Hello,

The gain is Vout/Vin, which is A2/A1 in our circuit, so why would you subtract anything like Vn010?

BTW we dont need "abs" anymore, because that is only needed when we do transient analysis, and then combined with that we need to take the average or find the RMS value. But with AC we just use the voltage itself because it is already expressed as a steady constant value for each frequency, ie "15 volts AC" or whatever, as just "15", no sine wave to deal with.

 

[sagh]

Because we have a differential amplifier and Vin is the difference of inputs so the gain is Vout/ difference of inputs.

 

[MrAl]

Hi,

That's the differential gain.

The common mode gain is Vout/Vin where Vin is one of the inputs with both being the exact same sine amplitude and phase, or with both inputs tied together and just one input sine source.

So the differential gain is tested with two DIFFERENT inputs, while the common mode gain is tested with the two inputs exactly the SAME.

 

[sagh]

We have a differential amp. why don't we get zero volt at the last output? because of symmetry in circuit configuration and same resistors value we should be able to get 0 volt at least in LTspice.

 

[MrAl]

Hi,

Well not exactly because the symmetry is broken at the last stage where the model may take into account the real life CMRR behavior.

Also, even with perfectly equal amplifiers and no break in the symmetry there could be a "noise floor" where we measure something that isnt really there, like -300db or something like that.

 

[sagh]

So when I test this circuit in real world. I shouldn't expect to have a good CMRR because of mismatch and the other stuffs. It would be better if I could increase the CMRR.
besides I still don't know why by changing pairs of resistors to 1k and 10k at the last stage I can't get any result in LTspice.

 

[MrAl]

Hello again,

I dont know what kind of CMRR you will get, but yes it depends on some of the resistor matching too. That's the way it always is.

I was telling you that the model for the op amp may not be able to tolerate a load resistance of 1k in some cases. It could be something else about the model, or it could be that the numerical resolution of the spice algorithm can not handle certain values in this circuit. Maybe you can try a single op amp amplifier and see if the limitation is the same there too, or it's just when there are lots of other components which cause many more nodes that have to be solved for simultaneously.

 

[alec_t]

I don't know which version of the LM358 model you're using, but I came across this comment by Helmut Sennewald (Linear Technology's spice guru) dated 8/5/2004
"None of the tested LM358 models has correct quiescent current."
Op amp supply current modelling will be important in your circuit, because the opamp is between current mirrors.

Edit:
I had a play with your sim, but with the LM358 replaced by LT1001.
Here's what the CMRR plot looks like

 

[sagh]

I don't know which version of the LM358 model you're using, but I came across this comment by Helmut Sennewald (Linear Technology's spice guru) dated 8/5/2004
"None of the tested LM358 models has correct quiescent current."
Op amp supply current modelling will be important in your circuit, because the opamp is between current mirrors.

Edit:
I had a play with your sim, but with the LM358 replaced by LT1001.
Here's what the CMRR plot looks like
View attachment 86725

It's not my circuit. In this post I attached the whole circuit. you changed it a little bit I don't know why did you connect one of 10k resistors at inverting op amp terminal to SINE voltage source and the other 10k in second op amp was connected to the ground?

 

[alec_t]

why did you connect one of 10k resistors at inverting op amp terminal to SINE voltage source and the other 10k in second op amp was connected to the ground?

So that one amp operates in common mode and the other operates in differential mode. Then we can plot the CMRR (diff mode gain / common mode gain; equivalent to V(dif)/V(cm) since both amps have the same sine input)