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three phase inverter design in ltspice

I have designed three phase inverter in ltspice with SPWM technique using mosfet switch. the output voltage at the load is incorrect. could anyone please tell me what is wrong in the simulation to get the output properly.
 

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ChrisP58

Well-Known Member
Most Helpful Member
You're only driving the high side mosfets with 15 volts, so the highest voltage that the source terminals can get is 15 Volts minus the G-S turn on voltage of the mosfet. For the IRF510 that is 3.8 volts. So your source pins are only getting to about 11 volts.

If you want the source pin to reach the positive rail, you need to drive the gates with a voltage higher than the positive rail. This is typically done with either a gate-drive transformer, or a high-side mosfet driver.

What is the purpose of your K signals?
 
You're only driving the high side mosfets with 15 volts, so the highest voltage that the source terminals can get is 15 Volts minus the G-S turn on voltage of the mosfet. For the IRF510 that is 3.8 volts. So your source pins are only getting to about 11 volts.

If you want the source pin to reach the positive rail, you need to drive the gates with a voltage higher than the positive rail. This is typically done with either a gate-drive transformer, or a high-side mosfet driver.

What is the purpose of your K signals?
Can you please send me some model of gate-drive transformer, or a high-side mosfet driver circuits please?
 

ChrisP58

Well-Known Member
Most Helpful Member
The IR2110 is probably the most common driver. Note that it includes both a high and a low side driver. You would need three of them for a three phase system.
https://www.infineon.com/cms/en/product/power/gate-driver-ics/ir2110/

But there are many others. Here is a filtered list of some. Not all of these may match your needs.
High side drivers

Annother problem that you have is timing between the low and high mosfet drive signals. As is, you have them changing at the same time. You need to add some dead time between the two transitions to ensure one mosfet of a vertical pair is fully off before the other turns on. Otherwise they are briefly both on at the same time which creates a short circuit between the positive and negative power rails.
 

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