RC time, using a Stop Watch, RC time is longer in time is the capacitor bad?

[Billy Mayo]

A series capacitor with a resistor in parallel to ground ( is a lagging network)
A series resistor with a capacitor in parallel to ground ( is a leading network)

But what is a Resistor tied to VCC and a capacitor tied to ground? The capacitor gets charged from the resistor tied to VCC , is this a lagging or leading network?

Op amp output#1 goes to a Resistor tied to VCC with a capacitor tied to ground , the node that connects the resistor and capacitor goes to the input of Op amp#2

Op amp#1 output ----> goes to resistor tied to VCC with a cap tied to ground ----> Op amp#2 Input

The Resistor is tied to VCC is in parallel with the Op amps#1 output & Op amps#2 input , but so is the capacitor tied to ground is in parallel to Op amps#1 output and Op amp#2 input

Since the Resistor and capacitor are both in parallel , is this a lagging or leading network?

 

[audioguru]

A series capacitor with a resistor in parallel to ground ( is a lagging network)
A series resistor with a capacitor in parallel to ground ( is a leading network)

You copied WRONG what I said on the other website forum. I said:
"A series resistor then a capacitor to ground (or to the supply voltage) is a simple lowpass filter that causes a delay. (It is a lagging network)
A series resistor with a capacitor in parallel is a simple highpass filter. (It is a leading network)"

But what is a Resistor tied to VCC and a capacitor tied to ground? The capacitor gets charged from the resistor tied to VCC , is this a lagging or leading network?

A 741 opamp WILL NOT WORK if its input has a resistor to its VCC. As the capacitor is charging then it is a lagging network until the input voltage reaches the voltage where the opamp stops working.

Op amp output#1 goes to a Resistor tied to VCC with a capacitor tied to ground , the node that connects the resistor and capacitor goes to the input of Op amp#2

The output of an opamp can go high or it can go low. A resistor to VCC at its output does not make sense.

The Resistor is tied to VCC is in parallel with the Op amps#1 output & Op amps#2 input , but so is the capacitor tied to ground is in parallel to Op amps#1 output and Op amp#2 input

A capacitor to ground at the output of an opamp might cause it to go crazy if it has negative feedback.

Since you do not post schematics then we do not know the circuits.

 

[MrAl]

Hi,

Strictly speaking, a phase lead network has the cap in series with the input, while a phase lag network has the cap in parallel with the output (possibly with another resistor in series).

When a resistor is placed in parallel with a capacitor, it creates an RC network but the function is going to depend on how it is connected to the rest of the circuit. If it is in series then it is leading, but if in parallel then it is lagging, but leading and lagging are frequency domain specifications and that is not always the viewpoint we want to take. Sometimes it's mostly about what is happening in the time domain. For example, a resistor to Vcc and cap to ground is often used for power on reset or for just a little more power supply filtering. The variations that are possible are too numerous. If you post a circuit we can take a look, but the descriptions of anything but the simpler circuits are too hard to follow in words that's why we draw schematics. So draw a schematic and we'll take a look.

The time constant allows us to write equations a little simpler sometimes. For the phase lag network with two resistors R1 and R2 we can write the transfer function in terms of the time constant T as:
G=(1+j*w*T)/(1+j*w*a*T)

where in this case:
T=R2*C, and
a=(R1+R2)/R2

and this is just a low pass filter with added resistor R2 in series with the cap.

 

[Mike odom]

No, you're moving from a leaky (and unreliable) large electrolytic to an on-chip tiny capacitor. which won't be leaky

Yes, the problem isn't so much the leaky capacitors, as everything has leakage. You just need to know what that is so you can design around it. The real issue here is trying to get the LONG delay, which means large resistors and then reducing the charge current so that the leakage now becomes a large percentage (if not greater than) the charging current, so all kinds of problems arise. Best if your charge current is on the order of 2 magnitudes higher (x100) than your leakage current, keeping it down to less than a percent of your charge current and nulling it out. I remember in the 80's, even trying to get a RC delay of 20 or even 10 seconds was a significant problem. Then they came out with a 555 tied to a count down register (on a single chip) which made long delays very easy, and much more accurate. Kinda like what the pic chip does. the internal RC's are trimmed pretty accurately, but you still have the problem with drift over temperature.

I notice you removed the 'long' from the timings quote

Not intentionally, just shortening the overall sentence length.

 

[MrAl]

Yes, the problem isn't so much the leaky capacitors, as everything has leakage. You just need to know what that is so you can design around it. The real issue here is trying to get the LONG delay, which means large resistors and then reducing the charge current so that the leakage now becomes a large percentage (if not greater than) the charging current, so all kinds of problems arise. Best if your charge current is on the order of 2 magnitudes higher (x100) than your leakage current, keeping it down to less than a percent of your charge current and nulling it out. I remember in the 80's, even trying to get a RC delay of 20 or even 10 seconds was a significant problem. Then they came out with a 555 tied to a count down register (on a single chip) which made long delays very easy, and much more accurate. Kinda like what the pic chip does. the internal RC's are trimmed pretty accurately, but you still have the problem with drift over temperature.



Not intentionally, just shortening the overall sentence length.

Hi,

Actually the PIC chips have a partially temperature compensated internal RC oscillator so it maintains about 1 percent accuracy over the temperature range 0 to 85 degrees C. I've never actually tested one but that appears in the data sheets for example in the 12F675 device. So it is not your typical RC oscillator.

 

[Billy Mayo]

The time range is min. 3.5 seconds and the max. is 5.0 seconds

if you get a time that is 2.5 seconds , what is wrong with the cap? high ESR

if you get a time that is 7.0 sseconds, what is wrong with the cap? high ESR?

 

[kubeek]

first case, with everyting else being the same, would be lower capactiance or lower leakage than expected, second case would be either higher capacitance or higher leakage or combination thereof than what the circuit was designed for.

 

[Billy Mayo]

so higher leakage increases the time? and lower leakage will decrease the time?

how can a cap have a lower leakage?

 

[kubeek]

Imagine the circuit is tailored to some specific capacitor, and because the time constant is so long the leakage from the datasheet could be taken into account. Now you change it for a different type like foil instead of electrolytic which will have lower leakage, so the overall timing will change.

 

[MrAl]

Hi,

I think we have to separate the natural cases from the man made cases where we swap out one cap for another by unsoldering and soldering in a new one.

Another problem with larger caps is the capacitance goes down with time. That causes the timing period to decrease. In power supply caps that i have tested this can be a considerable effect as with the ESR.
In a timing circuit however we would not expect high surge currents so i would think they would fair better, but then there is the age itself which could be a factor in drying out the capacitor which in turn lowers the capacitance.

Rather than keep asking what causes slower or faster timing you should present a circuit and we can look at that. This would tell you more specific things about that kind of circuit. Then we can look at another circuit and see what that one does.

When the timing changes the best thing to do is TEST the capacitor and see if it changed. TEST the resistor, TEST any other part of the circuit that can be a factor such as a comparator. That's the best way to determine what is causing your particular problem.

If you want to look at a general purpose timing circuit we can do that i guess, but we need to start talking about more specific things here otherwise you'll never get a handle on this.
The simple comparator plus cap and resistor is a good starting place. Then we can look at what happens when certain things change like ESR, capacitance, resistance, even power supply voltage.
Sound good?

 

[Billy Mayo]

What RC network is this called? because R58 is what controls the time to the C13 capacitor, the 10 volts from R58 is what charges the cap.

 

[Billy Mayo]

RC network
https://s1348.photobucket.com/user/BillyMayo1988/media/RCnetwork2_zpsffbfbdce.jpg.html

RC network
https://s1348.photobucket.com/user/BillyMayo1988/media/RCnetwork1_zpse30bd24b.jpg.html

 

[Billy Mayo]

Audioguru said there can not be a pull up resistor on the output of an op amp, and you can see R58 is a pull up resistor on the output of U9 pin#6

The problem I'm having is that U8 Pin#12 , threshold voltage is fixed internally , The time it takes C13 to change to the threshold is delaying the op amp U8 to switch it's output Pin#14 to late

To Find the threshold voltage is really hard because the C13 has to charge and my DVM meter will read random because it's switching decimal places from millivolts to volts and that transitions when the meter is switching is when the threshold is.

I'm trying to find out the threshold of U8 pin#12 , but there is that C13 charging cap on the input, It's hard to find out when at what voltage it is when the output switches from low to HIGH state

I tried using an oscilloscope
Channel#1 on U8 input pin#12
Channel#2 on U8 output pin#14

Channel#1 has a charging voltage expotential curve
Channel#2 has a Squarewaveform

My problem with that it needs to have two different Time sweeps in order to view them at the same time on the o scope

So how do I set up my O scope to do this test please?

 

[MrAl]

Hi,

Well actually R58 is isolated from U9 pin 6 with a diode, so it's not connected directly to the output. In this circuit it looks like a typical delay network. The diode allows the cap to be discharged when U9 output goes low, but when U9 output goes high then the capacitor can only charge through R58 and so R58 is a timing resistor not really a pullup resistor per se. So the charge time is set by the capacitance and the resistance of R58.

The threshold of U8 pin 12 should be ground, whatever that connects to, and if that is zero volts then that is the threshold.

 

[Billy Mayo]

Well actually R58 is isolated from U9 pin 6 with a diode

How does the diode Isolate the U9 output? cause when U9 output goes high the diode turns on and how can it be isolated?

but when U9 output goes high then the capacitor can only charge through R58 and so R58 is a timing resistor not really a pullup resistor per se.

Yes true, I just don't get it because I would think the when U9 output went HIGH that the diode turns on and the cap get's charged from U9 output High signal right?

The diode allows the cap to be discharged when U9 output goes low

So the Diode discharges the cap through the U9 output pin to ground? it discharges going inside the output pin to the IC ground?

The threshold of U8 pin 12 should be ground, whatever that connects to, and if that is zero volts then that is the threshold.

The threshold of U8 is not ground or zero volts, unless the RC network starts it's voltage below ground in the negative ?

It's really hard for me to find the threshold voltage because of the charging time of the cap and when the output switches HIGH
I tried using a 2 channel o-scope , channel one on the input and channel two on the output and I stored it
It's hard to fit onto the o scope display using one time sweep for both of these two different waveform shapes to do measurements

but when U9 output goes high then the capacitor can only charge through R58 and so R58 is a timing resistor not really a pullup resistor per se. So the charge time is set by the capacitance and the resistance of R58.

Yes true, But what kind of RC network is this, Since the Timing Resistor is in Parallel , tied to VCC and in parallel with the Cap, both R and C are in parallel with each other, I can't find in my electronic book if this is a lead or lag or what?

 

[Billy Mayo]

U8 switches when the voltage on pin 12 is the same as the voltage on pin 13. Pin 13 is connected to ground, so the threshold is at zero volts.

The Voltage dividers of R58 and C13 starts at -11.23 volts
Other boards R58 and C13 start at -10.48 volts

Doesn't this starting point cause a different delay time to reach the threshold? what is this called ? i just call it a starting bias point , it's the node between the R58 and C13 were that meet together creates a voltage divider

 

[Reloadron]

Something I noticed was the people who designed this test set had a love affair with the old LM741 Op Amp. The circuits you ave posted have no shortage of them or also the old LM148 which is a quad LM741. They use them extensively in comparator circuits. Looking at most of this stuff reminds me of assorted aircraft (fixed and rotary wing) test sets I worked on in my early life. Anyway, in part here is how I see what you have. One of your links wouldn't load but looking at the other. U9 the 741SP is configured as a comparator. R60 and R61 form a divider network referenced to 10 volts. Note the 10 volts as it shows in the drawings is labeled +10 VR (Voltage Regulated) meaning it should be a stable 10 volt reference used throughout all the circuits in the test set. With R60 & R61 acting as a divider the voltage input to U9 pin 2 inverting input is .267 volt (267 mV).

When U9 non inverting input pin 3 is below 267 mV the output of U9 pin 6 should be low (around -11 to 12 volts) which will hold the + (positive side) of C13 at about -11 to 12 Volts through the switching diode CR19 a 1N4148. This runs with your note of 11.9 Volts I see on the drawing. Now when the non inverting input pin 3 of U9 goes above 267 mV the output of U9 will swing high close to 13 volts. The 741 is an old Op Amp and will never swing rail to rail (-13 to 13 volts). As soon as that happens C13 will begin to charge through R58 (the 10 volt reference supply). Since T = R * C the RC time is 4.2 seconds for C13 to show a 63% change in a positive direction. Keeping the numbers round and simple the difference between -12 and 10 is 22 volts and 63% of 22 volts is 13.86 volts. Therefore we should cross zero in about 4 seconds. Just about 1 R*C time constant.

When we cross zero then U8 will do his thing. U8 is just another comparator stage following a delay and referenced to 0 volts on the non inverting input pin 12 as pin 13 is tied to ground. All of this is nothing more than a time delay circuit using comparator circuitry. We have an event and some period of time later we want something else to happen.

As was beaten to death in this thread, RC timing circuits like this are far from dead accurate. Capacitors alone have wide tolerances and that does not even take leakage into consideration. If the designer is worried about accuracy they make the resistor a pot and subject it to regular calibration.

Ron

 

[Reloadron]

To add a little:

The Voltage dividers of R58 and C13 starts at -11.23 volts
Other boards R58 and C13 start at -10.48 volts

Heck yeah, that is normal. Here is what is going on. The supplies are 13 volts and - 13 volts. Now even if we assume a perfect 13.000 volts with op amps like the old 741 here is what happens:

Output Voltage Swing: The output can't swing all the way to the power supply rails. The max output voltage also depends on the load current. With a smaller load (i.e. a big load resistor drawing little current) the output can go higher than with a large load (i.e. a small load resistor requiring more current). Most op-amps can swing the output to within a few volts of the power supply rails. Note: There are special op-amps called "Rail-to-Rail" op-amps that can swing the output to within 100mV of the supply rails. These special op-amps are often used in battery operated products where the power supply may be 6V or less.

No two operational amplifiers are the same. That is why you are seeing what you are seeing. In an ideal world the op amp output would swing from -13 to 13 volts when powered by same but the old 741 is not a rail to rail operational amplifier. Newer op amps can do a much better job. they are called rail to rail op amps. So what you are seeing comes as no surprise.

Finally, always check the supplies! That should be done before even looking at anything else. Those plus and minus 13 volt supplies should have tolerances. They need to be in those tolerances. Do those boards that start at -11.23 and the boards that start at 10.48 have the same +/- 13 volt supply readings?

Ron

 

[MrAl]

The Voltage dividers of R58 and C13 starts at -11.23 volts
Other boards R58 and C13 start at -10.48 volts

Doesn't this starting point cause a different delay time to reach the threshold? what is this called ? i just call it a starting bias point , it's the node between the R58 and C13 were that meet together creates a voltage divider

Hi,

The diode turns ON when the output of U9 goes negative, and the diode turns OFF when the output of U9 goes positive. That's because a diode conducts when the anode is made more positive than the cathode by some small voltage level like 0.7 volts.

You should abandon the terminology "lead" and "lag" network when dealing with RC timing networks. RC timing networks are not used in the same way that lead and lag networks are used even though they may be the exact same circuit. In other words, it does not make much sense to use those descriptions when we are working in the time domain when the networks are used for timing rather than frequency compensation.
The RC network we are talking about here is simply a timing network, that's all. The capacitor charges and discharges over time. Also, there is no parallel resistor only a series one. The cap charges through that one resistor R58 and discharges through the diode.

The 'starting' voltage of the cap is called the "initial value" of the capacitor and in this case the initial value is the initial voltage, so we can also call it the "initial voltage" but the more general phrase is "initial value". It is also called the "initial condition" of the capacitor, and that is the value of voltage or current associated with the capacitor before any time has passed, so it is specified at t=0 seconds. In this case it is more appropriate to specify the initial voltage as the initial condition rather than the initial current.
Note the initial value is either a voltage or a current associated with the cap, and has nothing to do with the actual value of the capacitor in Farads which is a different specification.

 

[Billy Mayo]

Do those boards that start at -11.23 and the boards that start at 10.48 have the same +/- 13 volt supply readings?

Yes all the boards VCC and VDD are +/- 13 volts , the only difference is the voltage divider node changes between (-) 10 to (-) 12

This is called a bias starting point? the node of the voltage divider?

The Resistance and capacitance tolerances is what changes the voltage divider nodes voltage