Counter - Door

[vne147]

i checked with the datasheet, its not necessarily to be changed when the clock is high. see the timing diagram on the data sheet. but it can be allowed to change when the clock is high and will only reflect during the next clock.

I think the concern with changing the UP/DN pin when the clock input is low has mostly to do with possible counting errors introduced from the delay in the UP/DN input not being sensed until the next clock cycle. I know it is not in the data sheet. I got that info from here. The source could be wrong but if you scroll down to where they talk about ripple counters, it's mentioned. I haven't done an exhaustive search of the internet to see where else this concern is mentioned if anywhere.

One other thing. I guess I wasn't paying close enough attention before but your schematic has seperate outputs for count up and count down. I haven't simulated your circuit but I'm assuming count up is high and count down is low when increasing the count, and vice versa for decreasing the count. The 4510 only has one pin for both up and down. If the pin is high, it counts up. If the pin is low it counts down. So either he'll need to choose a different IC that has two seperate pins or have to add an additional logic gate or maybe a few transistors to make your output compatible with the 4510.

 

[mbarazeen]

if you see post #8 on this threat, the schematic shows up/down and count out puts.
ie high/low input to 4510 to set forword or reverse count.

the out put "count" is the clock pulse input to 4010 so every time when "count" goes high the counter will be clocked and will count up/ down depends on the input high/low at its pin Up/Dn.

see the timing diagram on 74HC4510 Datasheet pdf - BCD up/down counter - Philips , every clock pulse makes the count (provided enable,etc) and increses when Up/Dn is high continuously. and wise versa

 

[vne147]

if you see post #8 on this threat, the schematic shows up/down and count out puts.

OK, I see in post#8 how you have combined the two outputs into one with the 2 NAND gates. That is what I was referring to so sorry that I didn't notice that you had already thought about it.

As far as whether or not you should change the UP/DN pin state at times other than when the clock input is high, here is an expert from the datasheet you linked to in your last post:

Ripple clocking mode: the UP/DN control can be changed at any count. The only

restriction on changing the UP/DN control is that the clock input to the first counting​

stage must be “HIGH”.

It's on page 11, figure 13, in the note at the bottom of the figure.

 

[mbarazeen]

yes it has been mentioned in ripple clocking, any how its depend on the coice of the OP whcih type his selection gona be.
if he will have any problem that time we can sugest some alternation.

 

[vne147]

yes it has been mentioned in ripple clocking, any how its depend on the coice of the OP whcih type his selection gona be.
if he will have any problem that time we can sugest some alternation.

Sounds Good!

 

[Boncuk]

Hi vne147,

how many persons would you like to count? The logic for counting up and down has been covered.

I guess false clocking (counting) cannot occur since the direction information is there before the clock pulse.

I made a circuit counting three digits using CD4510 and 4511. If you need a lower count just omit one or two counter(s) and decoder(s)/driver(s). PCB size is 3.3X2.9inches (double sided).

Simulation shows that even at a relatively high clock frequency (10Hz) the counter reacts immedeately when changing count direction.

I'm more afraid that kids learn pretty fast how to "cheat" the counter. For that reason I have included a RESET button to correct for false counts.

If you reset the counter in the room which is to be monitored you must wave your hand through the light barrier to advance the counter to "1".

Regards

Boncuk

 

[Mike odom]

If the in and out detectors are close enough together so that they are both broken at the same time (of course, one before the other), then it becomes a simple logic soln:
One LED detector drives the data pin of a D flipflop (7474). The other drives the clock. Let's call them C and D (clock and Data?)...
if C is broken BEFORE D, the f/f is clocked low. If D is broken before C, then the f/f is clocked high. This can be your direction bit... now all you have to do is delay your clock and then use it to clock an up/down counter (you don't want to clock the counter at the same time as you clock the direction f/f. When both LED detectors are inactive, you reset the f/f (or not, it will be clocked to the correct direction on the next clock pulse). This is a trick used in shaft encoders to determine the direction of rotation along with the speed.