vne147
Member
i checked with the datasheet, its not necessarily to be changed when the clock is high. see the timing diagram on the data sheet. but it can be allowed to change when the clock is high and will only reflect during the next clock.
I think the concern with changing the UP/DN pin when the clock input is low has mostly to do with possible counting errors introduced from the delay in the UP/DN input not being sensed until the next clock cycle. I know it is not in the data sheet. I got that info from here. The source could be wrong but if you scroll down to where they talk about ripple counters, it's mentioned. I haven't done an exhaustive search of the internet to see where else this concern is mentioned if anywhere.
One other thing. I guess I wasn't paying close enough attention before but your schematic has seperate outputs for count up and count down. I haven't simulated your circuit but I'm assuming count up is high and count down is low when increasing the count, and vice versa for decreasing the count. The 4510 only has one pin for both up and down. If the pin is high, it counts up. If the pin is low it counts down. So either he'll need to choose a different IC that has two seperate pins or have to add an additional logic gate or maybe a few transistors to make your output compatible with the 4510.