[Solved] Need help regarding for modify decade counter waveform

[Green7]

I'm new to this forum, sorry my english is not that good, just use a translator, and my knowledge about circuits and electronics is very low,
Here I want to ask for help from fellow forumers

Please help regarding the decade counter

For example clock input from ic555 t-on 30% and t-off 70%. see the example in the picture

If using ic4017 decade counter and activate 3 outputs, ouput from ic4017 such as A1, A2, A3


What is the easiest way to get outputs like B1, B2, B3, which only follows the T-on clock input

Hope fellow forumers can help me

[Update Solved 27 Mar 2023 ]

I update for reference, After searching for AND gates using transistors,

By using an NPN transistor as an AND gate, the voltage and Ampere ouput B1, B2, B3 can be controlled higher and wider depending on the input value or Vcc

And if the output value from ic4017 is enough, we can use only 1 NPN transistor to get the output B1, B2, B3,

Credit to Diver300

 

[Papabravo]

I think that would be an excellent idea. It helps to acquire the basic principles before attempting to climb a mountain.

 

[Pommie]

If you look at your first diagram in your first post, output 1 in on for a very short time at the beginning of clock 2. This is what may cause the glitch referred to by papabravo.

Mike.

 

[Green7]

If you look at your first diagram in your first post, output 1 in on for a very short time at the beginning of clock 2. This is what may cause the glitch referred to by papabravo.

Mike.

you mean, the main factor of edge glitches is due to the t-on being too short?


Due to time constraints and circumstances, I did not have time to make and test it. hope this edge glitches won't happen

 

[Pommie]

The t-off being too long. It really depends on the rest of the circuit.

Mike.

 

[Pommie]

The edge glitches can be avoided by slightly delaying the clock signal.

Mike.

 

[Green7]

The t-off being too long. It really depends on the rest of the circuit.

Mike.

The edge glitches can be avoided by slightly delaying the clock signal.

Mike.

Thanks Pommie for the information provided, I will quote what you said, later when I have the opportunity, I will test it on the circuit, I hope there is no problem