Resistive FET Biasing Network

Hi all -

Currently designing a resistive network with two 12Vdc supplies used to bias either a JFET or MOSFET (both N type). Essentially I need to be able to bias each device in several different ways, so the it is likely that some of the resistors will be replaced by potentiometers (namely, one of the resistors in the voltage divider and probably the resistor(s) on the source (possibly drain as well) node of the device. I might also just swap out entire resistors if it turns out I don't need too many different biasing levels.

anyway, schematics below.

the 1 meg resistor is to provide a high impedance node to the gate.

I have little (no) experience with JFETs, but it seems that the only major difference for biasing is that the gate needs to be below the source voltage for it to turn on. So, does it seem like these circuits will work for MOSFET and JFET biasing, if connected as shown? I'm trying to keep the circuit as similar as possible between the two, so I can swap out one device for another making as few changes as possible.

thanks!

EDIT: forgot to mention, i want to bias mostly in the saturation region. this looks close to accomplishing it.

im currently trying to simulate the circuit. does anyone know how to do a sweep of a resistor value, rather than a voltage sweep?

Why switch between a jfet and mosfet at all? Why not make a circuit that only uses mosfets?

Sceadwian said:

Why switch between a jfet and mosfet at all? Why not make a circuit that only uses mosfets?

Click to expand...

ah, probably should have explained the application.

the circuit is used to bias the transistor at a certain point for making noise measurements at the drain. (transimpedance amp will be hooked to the drain of the device). want to compare measurements of JFET noise to MOSFET noise.

fortunately, the transimpedance amp has an input offset current source, which will be used to cancel out the DC current that would otherwise flow into it, which helps to overcome the fact that it has a low input impedance. (could also accomplish the DC blocking with an AC coupling cap, but this way we can achieve undistorted noise measurements.)

solis365 said:

I have little (no) experience with JFETs, but it seems that the only major difference for biasing is that the gate needs to be below the source voltage for it to turn on.

Click to expand...

Actually most JFETS are depletion mode which means you need a voltage below the source voltage to turn them off, not on. They are full on when the gate is at the source voltage.

crutschow said:

Actually most JFETS are depletion mode which means you need a voltage below the source voltage to turn them off, not on. They are full on when the gate is at the source voltage.

Click to expand...

ah, yes. kinda forgot about that when posting.

anyway, to bias them at different points you want to adjust how far the gate is below the source, correct? thats why the network for the JFET is structured as such.

solis365 said:

ah, yes. kinda forgot about that when posting.

anyway, to bias them at different points you want to adjust how far the gate is below the source, correct? thats why the network for the JFET is structured as such.

Click to expand...

That is correct.