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problem with counter up and down circuit

Discussion in 'Electronic Projects Design/Ideas/Reviews' started by klknight93, Dec 29, 2017.

  1. klknight93

    klknight93 New Member

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    actually , i also used oscilloscope to check my button , but it is a good bouncing condition which means that not my button problem. i just cant figure it out where is the main problem . i also check 74ls47, it is also good condition which show the correct sequence. i am speechless on this design .a lot of ppl met the same problems as mine but there are no real solutions to it .
     
  2. Pommie

    Pommie Well-Known Member Most Helpful Member

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    Could you have a loose connection/bad joint somewhere?

    Mike.
     
  3. AnalogKid

    AnalogKid Well-Known Member

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    1. Check every connection to make sure it is wired exactly like the schematic.

    2. Add decoupling capacitors at *every* IC power pin. These should be as close as possible and have very short leads.

    3. Post your most recent schematic. Make sure every part has a part value and a unique reference designator.

    ak
     
  4. dave miyares

    Dave New Member

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  5. klknight93

    klknight93 New Member

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    i already settle all the problems. i will post my latest design soon. thanks to u all .
     
  6. klknight93

    klknight93 New Member

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    guys , this is the complete circuit . i may conclude that this circuit need a logic gate to saturate the inputs. How i say so ? there are few problems on inputs when i pressed the button during first schematic, sometimes it is bouncing and having curve wave (probably this is the reason why the counter jumps so many, from digit 6 to 10).
    Thx to AnalogKid , he provided me a lot of solutions and found out reset button has to be connected with 100k resistor . 1k resistor will occur the problem he mentioned which the counter will decrease by 1 digit when the power is supplied. 100k resistor can prevent this problem.
    Below is my circuit, hopefully it will help u all next time , thx you for solving and discussing the problems with me . thx to u all so much.
    notes *- R5 has to change to 1k ohm when stimulating the circuit (i dont know why but actually it needs 100k to prevent the problem).
    upload_2018-1-8_14-17-9.png
    upload_2018-1-8_14-18-11.png
    upload_2018-1-8_14-18-23.png
     
  7. klknight93

    klknight93 New Member

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    by the way, those inputs are not necessary to be grounded. If u wanna set a initial input to certain digit then u have to make the correct sequence like 1000(high low low low ) to get digit 1.
     
  8. dave miyares

    Dave New Member

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  9. schmitt trigger

    schmitt trigger Well-Known Member

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    Klknight:
    First of all, I want to congratulate you on your quest to learn discrete logic design....... It might be on the obsolete side now, but that doesn't mean that you can't learn a bit or two by designing a simple circuit like a counter.

    You have already implemented the cross-coupled gates as a debouncing circuit, excellent!
    Another way to do it is to use an RC filter (like you have done) followed by a schmitt trigger-input gate like the 74LS14. Real-world TTL inputs do not like slow ramping waveforms (like a C being charged thru an R), and not only do they consume extra current spikes, they could also oscillate.
    The 74LS14 eliminates that issue, in case you want to keep using TTL circuits. For CD40xx series CMOS, you may use the CD40106.
     
  10. AnalogKid

    AnalogKid Well-Known Member

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    Sorry guys - those cross-coupled gates do not debounce anything.

    Using the up button as an example, U5A, U5B, and U6A are the logical equivalent of a piece of wire. And because none of them have Schmitt trigger inputs, the asymmetrical lowpass filter effect of R1-C1 does *not* prevent a noise burst out of U5B and into the counter.

    R1 and C1 do debounce the leading edge of the switch signal, but not by much. (1 millisecond is not a long enough time constant to clean up most switch bounce. Think 10 ms minimum.) BUT, they also slow down the trailing edge after the switch is released. This slow edge goes into a gate with nanosecond response time. While this doesn't guarantee a 5 V tall noise burst at the output, it certainly is more likely than with a faster edge.

    Some counters have schmitt trigger stages for the clock input, but the gate is presenting a full-amplitude square wave burst that would sail through a schmitt input. If you want to have the same logic polarity, replace the three gates with two sections of a 74LS14 in series.

    For a detailed description of how a Schmitt Trigger circuit works, please contact member # 136174.

    ak
     
    Last edited: Jan 8, 2018
  11. schmitt trigger

    schmitt trigger Well-Known Member

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    AK;
    you are correct.
    The cross coupled gates work only with a switch which has NO and NC contacts, and each contact goes to an individual gate.
    The inverter is "emulating the NC contact" in the simulation, but in the real world, the problem would persist.
     
  12. klknight93

    klknight93 New Member

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    guys , i did trying to use 74LS14 ,but i cant get the output . hence i directly found out this latest circuit. Maybe i made the wrong connection during implementation of 74ls14. anyway, there are tons of solutions , my circuit just be 1 of the examples, really thx you to u all who discussed with me . making my mind become clear.
     

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