blackshadow
New Member
Hello Everyone,
I do have an electronic circuit with the following goals:
a. if the input voltage is >7.0V, supply the load with Vsource1 (0 to 3.5V)
b. if the input voltage is <1.0V, supply the load with Vsource2 (2.2V)
I have simulated this conditions using PNP(2N2907) and MOSFET (BSS138).
See attachments (schematic and .asc file)
At condition #b, simulation output Vload at 1.89V, 2V, 2.16V as VVAsource1 increases.
Why is this? Ideally, the MOSFET should be switched OPEN hence it should not affect Vload.
I now implemented the circuit with;
>Gate/Drain Bias set to 0.0V
>VVAsource1 set to 1.5V
>VVAsource2 set to 2.2V
Actual measurements;
>Vload = 2.17V
>Vgate/drain = 1.48V!
Why are we having a voltage drop at Vgate/drain supply source? The voltage measured also varies as we vary VVAsource2.
Need your inputs.
I do have an electronic circuit with the following goals:
a. if the input voltage is >7.0V, supply the load with Vsource1 (0 to 3.5V)
b. if the input voltage is <1.0V, supply the load with Vsource2 (2.2V)
I have simulated this conditions using PNP(2N2907) and MOSFET (BSS138).
See attachments (schematic and .asc file)
At condition #b, simulation output Vload at 1.89V, 2V, 2.16V as VVAsource1 increases.
Why is this? Ideally, the MOSFET should be switched OPEN hence it should not affect Vload.
I now implemented the circuit with;
>Gate/Drain Bias set to 0.0V
>VVAsource1 set to 1.5V
>VVAsource2 set to 2.2V
Actual measurements;
>Vload = 2.17V
>Vgate/drain = 1.48V!
Why are we having a voltage drop at Vgate/drain supply source? The voltage measured also varies as we vary VVAsource2.
Need your inputs.