You can generate an variable duty-cycle signal directly with a timer chip, or you can convert your square wave into a linear ramp, then feed it into the + input of a comparator with the - input being fed by a variable resistor connected between the rails. Use the variable resistor to vary the duty cycle.
If you want to do this automatically as the freq of the the square wave is varied, then use a phase-locked-loop with a divide by 3 counter between the VCO and one input of an edge-sensitive phase comparator. The other input of the phase comparator gets the original square wave. The output of the divide by three counter (phase comparator input) will have a 1/3 duty cycle.
The VCO will be operating at three times the frequency of the square wave.
What is the range of the square-wave frequencies?
How rapidly does it change from one frequency to another?
Does it slew smoothly from one frequency to another, or is it a step change of frequency?
The frequency range from 0 Hz up to 2000 Hz and the frequency operation of the device is always changing all the time because it is to drive dc motor and it is not working at constant speed.
And the changes are nearly smoothly.
If the frequency is very often to change, which one of the both solution is more accurate and have good stability ?
Because I must design in very small space ( 20 mm x 30 mm), do you know which IC is suitabel to do the circuit ?
Thanks for your help.
Can you modify the motor to output three pulses per shaft revolution? You could attach a disk with three (or multiple of three) holes, or three hall-effect sensors. That would eliminate the PLL. The divide by three counter would then have a 33% duty cycle with one cycle per revolution.
PLL: Look up LM565
Divide by three:4017
It seems easy, but it's not. Here is my effort. Essentially, U1 takes twice as long to ramp up as U3. Add the signals together, and you get a 1/3 - 2/3 duty cycle. U2 cleans up the edges.
I doesn't seem to simulate quite right. I think this would have to be built to tune up properly. It needs some more refinement. This is just an idea.
Suppress the spikes. Either method could be upset. The PLL is more likely to relock without a watchdog. Is the 33% duty cycle signal inside the control loop for the motor? If so, what happens if the PLL or PIC temporarily gets out of sync?