LTspice hierarchical block

[kingofjong]

Hi

I am using LTspice to create a hierarchical block for a custom circuit. I keep getting the error

I tried debugging the problem and everything in the symbol seems correct. The symbol is associated with my schematic.

I also viewed the symbols netlist and got the error

I am not sure what I am doing wrong. I would appreciate any help.

Thanks

 

[eTech]

Hi

Post the .asc and .asy tiles and we’ll take a look.

eT

 

[kingofjong]

Here is .asy and .asy

.asy

.asc and netlist

Thanks

 

[DerStrom8]

Your out1-out5 connections appear to not be connected. Note the electrical connection point on the left-hand side. There are no wires connecting to them.

 

[eTech]

DerStrom8 is right.

You have the "out" labels at the left of the schematic disconnected. Mirror them so they will connected to the wires.

Also...
Remove "Memory" from the symbol "value" field until the schematic is converted to a .subckt file containing a "Memory" subckt definition.

eT

 

[kingofjong]

Thanks that fixed my unused port out issue.