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i have some 4164 dram chips and i want to build a refresh circuit for them. ive tried looking on google but cant seem to find anything understandable. any help would be appreciated.
You use an 8 bit counter gated to the address pins, pulse /RAS low at regular intervals between normal access cycles. It needs to cycle through all 256 addresses every 4mS or less.
Years ago, I had the CPU refresh every 1mS. Set up an interrupt for the timing. I think I did 256 sequential reads as fast as possible. Don't remember the details.
The only ones I've built myself were for an old MC6809 system.
That CPU uses quadrature clocks (E & Q) and only access memory during E high.
I use E low & rising edge of Q to trigger a refresh then increment the counter.
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