# How to extend the range of an ADC

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#### ADWSystems

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I have a 0-5V input ADC and need to measure voltages between 0V and almost 24V. I need to do this without altering the resolution. So a simple resistor divider is out. I was thinking of using an opamp in a differential mode, with one input hooked to a resistor divider to input different ranges (0, 4.5, 9, 13.5, and 18). Starting at the highest range, if the ADC reads 0 then move to the next lower range until the ADC returns a reading.

It looks good to me on paper. I am now working to find an available opamp to fit in the circuit. As the inputs will be 0 to 24v, I think the power supply will need to be the same. The output will only be 0 to 5v, so plenty of headroom on the high side but will need to include Vee on the low side. I might be able to get a supply with -Vee but the opamps I have seen are specified +/-15V dual supply or +36v single supply. What happens if I use -5v and +24v? Smoke?

Is there another circuit I might consider? How do I find an opamp to fit the bill? I spent an hour trying to get Digikey to help narrow down the list but without success.

#### ronsimpson

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I need to do this without altering the resolution.
A 8 bit ADC will only be 8 bit no matter what you do to it. or Are you trying to keep 20mV/step?

#### ADWSystems

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Yes. The goal is to maintain the same resolution at 0-5V for the entire range 0-24V. A resistor divider isn't going to work. For 0-5V the entire ADC range can be used, but for 20-25V, only the top 20% of the ADC would be used.

It is a 10 bit ADC. I would like to maintain the 1.2mV resolution, at worst 6mV. I hoping to get a wider spec soon, but best to aim high to start. Don't you think?

I chose the 4.5V steps, so as to provide space for hysteresis in changing offsets and avoid getting to near the rails. 4.5V is not fixed, but easy to calculate. I was going to provide hysteresis thresholds 100mV apart and 100mV from the rail. In a voltage rising scenario, upon reaching 4.7V change up an offset level, that would then provide an ADW reading of 0.2V. If the ADC reading then drops below 0.1V, then drop down an offset level making the ADC reading 4.6V.

It just occurred to me, they make 18V and 9V voltage regulators. That would provide two of the steps, 4.5V is half of 9, a simple resistor divider, 13.5V is more tricky but easily derived from the 18V regulator.

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#### crutschow

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Doing the offset like that will preserve the resolution, but the accuracy will depend upon the accuracy of the offset reference voltage and the resistors in the differential circuit.
So what sort of accuracy do you think you need?

#### ADWSystems

##### Member
If an OpAmp have a power supply range of:
36V single supply and +/-16V single supply

Can it be powered by -5V and 24V?

If that works, then most of the input and output limitations are removed as the negative and positive rails will be a volt or more from the input signals.

Is there a spec for what happens when in+ and in- are equal? CMRR? How will that effect this?

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#### crutschow

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Can it be powered by -5V and 24V?
Yes.
As long the the total voltage is not exceeded (36V) and the input voltage range is within its limits.
Is there a spec for what happens when in+ and in- are equal? CMRR? How will that effect this?
Spec for what?
When the inputs are at an equal voltage, that's the normal linear operating condition.
The CMRR applies under those conditions.

#### ronsimpson

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It is a 10 bit ADC. I would like to maintain the 1.2mV resolution, at worst 6mV.
10 bit = 1024 steps. Spread out over 0 to 5 volts, that is about 5mV/step.
I think adding a pile of op-amps and resistors and Zeners will hide any accuracy.

Another option is some thing like MCP3425. 16 bit ADC (64000 steps) built in 0.05% 2.048V reference.
Adding two resistors to make 0-30V look like 0-2V. Then I think you can measure 0-30V at 0.5V/step.
These ADCs are slow. You can only get 15 samples/second.
I think there is a 4 input version.

#### ADWSystems

##### Member
I'm not sure why I used 12 bits in the calculator. I thought something was fishy about the 1.2mV/step, but didn't give it much thought. My focus was on the methodology.

MCP3425 isn't going to happen, being surface mount I don't have a way to deal with it. Not sure where the zeners came in, just the pile of (4) (adjustable) resistors.

Being 10 bit and 5mV/step, I would hope to be able to keep the error of the offsets within 5 steps (as specified originally). I would hope I could get within +/- 1 step (15mV).

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#### Pommie

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#### Nigel Goodwin

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I'm not sure why I used 12 bits in the calculator. I thought something was fishy about the 1.2mV/step, but didn't give it much thought. My focus was on the methodology.

MCP3425 isn't going to happen, being surface mount I don't have a way to deal with it. Not sure where the zeners came in, just the pile of (4) (adjustable) resistors.

Being 10 bit and 5mV/step, I would hope to be able to keep the error of the offsets within 5 steps (as specified originally). I would hope I could get within +/- 1 step (15mV).
You're making this VERY hard work, for absolutely no gain.

A simple resistive attenuator is all you need, and for a 10 bit A2D if you scale the values to give 102.3V FSD this gives you 0.1V resolution and sensible last digits (increasing 1, 2, 3 etc.) - for a 10V input accuracy is 1%, probably more than you're going to get from the rest of the system.

Why make work for yourself to make it more complicated without any gain?, or can you calibrate the entire system to more than 1% accuracy?.

#### ADWSystems

##### Member
Option A:

4:1 Resistor divider (to reduce 25V to 5V): Requires "calibration" of one resistor divider and has a resolution of 24mV/step

Option B:

Selectable Resistor Divider (none, 1:1, 2:1, 3:1, and 4:1): Each offset requires "calibration" of one resistor divider and has a resolution of 4.8mv/step.

So for a little more work and same "probability" of error, Option B provides 5x the resolution.

#### ronsimpson

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you can get resistors that are 0.1%.
What is your reference voltage?

#### ADWSystems

##### Member
I'm looking at using a 7818 and 7809, then a resistor divider from there. I haven't been able to find voltage references above 10.5V.

#### Nigel Goodwin

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Option A:

4:1 Resistor divider (to reduce 25V to 5V): Requires "calibration" of one resistor divider and has a resolution of 24mV/step

Option B:

Selectable Resistor Divider (none, 1:1, 2:1, 3:1, and 4:1): Each offset requires "calibration" of one resistor divider and has a resolution of 4.8mv/step.

So for a little more work and same "probability" of error, Option B provides 5x the resolution.
To what point? - and as you're scaling the result you lose the last digit anyway, as it makes no sense.

What kind of accuracy are you hoping for?, and why?.

#### crutschow

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I'm looking at using a 7818 and 7809, then a resistor divider from there. I haven't been able to find voltage references above 10.5V.
Those devices have poorer stability with temperature as compared to a good voltage reference IC.
To use a lower reference voltage you just scale the input voltage instead of the reference voltage.

#### ADWSystems

##### Member
To what point? - and as you're scaling the result you lose the last digit anyway, as it makes no sense.

What kind of accuracy are you hoping for?, and why?.
And why are you throwing away the last digit (I assume bit)? Still makes a 5x difference but 48mV/step vs 9.6mV per step.

#### ADWSystems

##### Member
Those devices have poorer stability with temperature as compared to a good voltage reference IC.
Agreed.

I'm assuming Ron was speaking of the voltage reference for the voltage dividers, not for the ADC (as each has their own built in reference).

To use a lower reference voltage you just scale the input voltage instead of the reference voltage.
You mean to scale the input voltage to be less than the reference voltage? That sounds like we just worked all the way around in a circle, back to the 4:1 resistor divider, when then makes the need of the voltage reference irrelevant.

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#### crutschow

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You mean to scale the input voltage to be less than the reference voltage? That sounds like we just worked all the way around in a circle, back to the 4:1 resistor divider, when then makes the need of the voltage reference irrelevant.
I stated that incorrectly.
I meant you scale the input offset from a lower voltage reference.
Below is the LTspice simulation of my concept to do that.
It sequentially switches in another resistor from the 5V, V_Ref to the summing junction of U1 at each 5V increment of the input to offset the input voltage.
The actual circuit will, of course, need some comparator circuits to do the switching.
You will likely also have to overlap the switch points with some hysteresis to avoid dead spots and dithering, which may require adding an extra range.

You can buy 20k ohms resistor networks that have precise matching to minimize errors from the resistor tolerance.

#### Nigel Goodwin

##### Super Moderator
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And why are you throwing away the last digit (I assume bit)? Still makes a 5x difference but 48mV/step vs 9.6mV per step.
Not last 'bit', last 'digit' - if you're scaling to anything other than 1023 (such as 102.3V as I suggested) then you have to multiply/divide the reading to get the range you need.

This means the last digit of the calculated value can only be certain values (it doesn't count 1, 2, 3 etc.), so to give sensible readings it's commonly removed.

As I asked before, why do you want to try and get accuracy greater than 1%?, and can you calibrate to do so?.

#### ADWSystems

##### Member
Not last 'bit', last 'digit' - if you're scaling to anything other than 1023 (such as 102.3V as I suggested) then you have to multiply/divide the reading to get the range you need.

This means the last digit of the calculated value can only be certain values (it doesn't count 1, 2, 3 etc.), so to give sensible readings it's commonly removed.
That's news to me. Now you will have to go on the tangent and explain your train of thought.

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