johankj
New Member
Hi,
Does anyone have any experience with these LCD Panels (Or ASCII panels in general) and their Enable (E) minimum rise time?
According to the data sheet, tcycE is minumum 1000nS (Enable cycle time), and must remain in high a minimum 450nS (Enable Pulse Width - PWEH). The address must be set in advance (Read or Write) tAS, and is 40nS.
I'm running my MCU at 4Mhz, which gives one instruction per uS. I set the address ~seven instructions prior to enabling (E). This should be enough satisfy tAS. Before setting (E), I write to the DATA lines. My question is then, after this:
How long do you reckon i should delay between enabling (E) and disabling (E)?
Edit: Mis phrase here, I did not mean rise time, but 'high' time.
Does anyone have any experience with these LCD Panels (Or ASCII panels in general) and their Enable (E) minimum rise time?
According to the data sheet, tcycE is minumum 1000nS (Enable cycle time), and must remain in high a minimum 450nS (Enable Pulse Width - PWEH). The address must be set in advance (Read or Write) tAS, and is 40nS.
I'm running my MCU at 4Mhz, which gives one instruction per uS. I set the address ~seven instructions prior to enabling (E). This should be enough satisfy tAS. Before setting (E), I write to the DATA lines. My question is then, after this:
How long do you reckon i should delay between enabling (E) and disabling (E)?
Edit: Mis phrase here, I did not mean rise time, but 'high' time.