delay circuit. First delay time slightly longer than preceeding

Status
Not open for further replies.

Grossel

Well-Known Member
Hi.

The goall is to built a simple RC delay circuit that has a cap discharge function. I'm not going to use any 555/556 timing circuits.

I do have some circuits that works. Common to them all is that whenever the circuits trigs, I cannot know the initial voltage of the cap. It would possible be some between 0V and 0,6V.

First circuit: Part of the problem is also that discharge procedure may discharge cap down to 0.6V and not completely to zeero.

Latter circuits: If it takes minutes between each trigger event, nobody knows the caps initial voltage. Basic problem.

Do you have some idea how I can improve (some of if not all of) those circuits so I can know for sure the initial voltage of the cap.

Thanks


[edit]
The transistor continue conducting after the flip flop was reset. So I figured out that first design doesn't have the error I described above. However, the resistor (forgot to draw it between !Q and transistor base) will waste some effect, so I have to solve that now.
 

Attachments

  • mono_SR+RC+npn.png
    3.5 KB · Views: 189
  • D-vippe_RC_schmitt.png
    2.3 KB · Views: 200
  • SR_RC_schmitt.png
    2.5 KB · Views: 187
Last edited:
Status
Not open for further replies.
Cookies are required to use this site. You must accept them to continue using the site. Learn more…