I assume that this must be a decade counter? It will require 7 flip flops, 4 for the units, 3 for the tens (since you're only going to 7). On the units counter, the Qb and Qd outputs must be monitored by an AND or NAND gate, depending on whether the flip flops have active HIGH or active LOW resets respectively and the output of the gate fed to the RESET input. On the tens counter, no external gates are required since it only counts to 7 (111b). Overall, another gate set must monitor all three of the tens counter output and the Qc and Qb outputs of the units counter. The output of this gate set must be combined with the outputs of the tens and units gates to reset both counters simultanously (terminal count of the overall counter). It would be a lot easier with MSI decade counter chips, of course. Using individual flip flops reeks of a school project.
Dean