PPS/CPS; pulse per second or cycles per second? Fractional pulses just make the understanding wierd. 1/0.5 =2 sec period.
Typical CMOS logic levels are nearly Vcc and Ground, but remember that you can have TTL compatable CMOS chips now. So, at 5V they have thresholds of TTL, but at 12V they don't. TTL is something like <1.2 is a low and greater than 2.5 V is a high from memory. CMOS might be something like Vcc-0.3 V and < gnd+0.3V . Do not quote me on these thresholds. To lazy to look them up.
Look at the instructions for your probe. TTL, CMOS and TTL compatible CMOS are different animals. Generally, you won't use the CMOS levels for TTL compatable CMOS circuits.
A threshold issue is usually a problem during design when one doesn't take into account the FAN out, or how many inputs the output can drive.
That COULD be perfectly normal.
Without seeing the circuit, I can't comment. By CMOS, do you mean a 4000 series chip or say an HC or HCT series chip.
Applying a HIGH/LOW depends on what the definition of HIGH/LOW is and the Chips used. If the high is >4.95 V and the high is applied through a bipolar transistor of a logic probe, then it's not likely to be above 4.95 V.
Logic families have changed a lot from the early definition of TTL and CMOS.
Billy said:So does the Logic Probe TTL/CMOS switch do anything, since the driving device output voltage levels are not the threshold levels?
Typical CMOS logic levels are nearly Vcc and Ground, but remember that you can have TTL compatable CMOS chips now. So, at 5V they have thresholds of TTL, but at 12V they don't. TTL is something like <1.2 is a low and greater than 2.5 V is a high from memory. CMOS might be something like Vcc-0.3 V and < gnd+0.3V . Do not quote me on these thresholds. To lazy to look them up.
Look at the instructions for your probe. TTL, CMOS and TTL compatible CMOS are different animals. Generally, you won't use the CMOS levels for TTL compatable CMOS circuits.
A threshold issue is usually a problem during design when one doesn't take into account the FAN out, or how many inputs the output can drive.
the OP said:At work I have circuit boards that have a Floating Cmos inputs, but the outputs of the Cmos gates are HIGH
That COULD be perfectly normal.
the OP said:The Cmos Logic Gate does go to a Cmos Decoder to a Cmos Flip Flop to a LIGHT
Without seeing the circuit, I can't comment. By CMOS, do you mean a 4000 series chip or say an HC or HCT series chip.
Applying a HIGH/LOW depends on what the definition of HIGH/LOW is and the Chips used. If the high is >4.95 V and the high is applied through a bipolar transistor of a logic probe, then it's not likely to be above 4.95 V.
Logic families have changed a lot from the early definition of TTL and CMOS.