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Current Circuits, DVM meter will short out when measuring on current circuits

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Thanks Chris for the help

Open collector outputs may be paralleled since there is no conflict with one out being LOW and other outputs being HIGH.

What you mean by paralleled?

A logic probe does have a pulse stretcher. This is needed to make a pulse that would be far to short for a human to see long enough to do so.

So what does the pulse stretcher do again? explain more please

It just makes you visually so on the Logic Probes lights alternating?


Is using a Logic Probe better at testing logic levels for TTL and CMOS , VS an oscilloscope?

Because TTL and CMOS have different Logic LOW logic voltages

For me, when looking at TTL and CMOS logic LOW state voltages , I can't tell if the output is Open, DEAD or a low state on an oscilloscope, how can you tell the differences?

When a Logic Probe it will tell me if my output on a TTL and CMOS is a LOW STATE or a DEAD output or a OPEN high impedance

How can you tell on an oscilloscope?

Also why A logic probe is better at testing logic levels is because the logic probe has the perfect probe impedance for logic outputs VS an oscilloscope it as a 10meg ohm impedance which loads the logic output

A Logic Probe has the Pulse Stretcher circuit so you can use it with a Logic Pulsar for troubleshooting
Since an Oscilloscope doesn't have a pulse stretcher circuit you "can NOT" view the logic pulsars microsecond waveshape in real time for troubleshooting using an logic pulsar right?
 
Some gates ADD the inputs and other Gates Multiple the inputs

What determines the adding or Multiplying inside the GATE?

I don't know what you are referring to here, unless it is the + and * symbols sometimes used in logic statements. If that is the case, be aware that the individual gates don't actually do any mathematical adding or multiplying.

Additive logic means OR, since the sum of x + y = 1 if either x OR y is a 1.
Multiplicative logic means AND, since xy (x*y) = 1 as both x AND y must be 1 for the output to be 1
 
Thanks Chris for the help

What you mean by paralleled?
A net with two or more outputs.
And a net is all of the pins that are connected directly together in a circuit. Vcc is a net, GND is a net. Many nets have only two pins, but may have any number of pins.
A netlist for a simple circuit consisting of a battery, a resistor and an LED might look like this:
Code:
Net1
    Battery1,1
    Resistor1,1

Net2
    Resistor1,2
    LED1,1

Net3
    LED1,2
    Battery1,2
A node (pin) in a netlist consists of a part number and a pin name. Battery1,1 means pin 1 of Battery 1

So what does the pulse stretcher do again? explain more please

It just makes you visually so on the Logic Probes lights alternating?
It stretches a pulse to short for you to see into one that is long enough for you to see. A 10nS pulse might be stretched into a 10mS LED flash or tone. See the datasheet of the probe you are using for it's exact behavior.

Is using a Logic Probe better at testing logic levels for TTL and CMOS , VS an oscilloscope?
A scope is FAR better than a logic probe. For instance, the probe will only indicate it saw a pulse, when there might have been 10, or 10,000,000 pulses. A good scope can show you that there were many pulses, their timing and magnitude. That being said, many times a probe is adequate, and I've worked on a lot of circuits with only a logic probe, but there are a lot of little problems that a probe just won't show you. And there is one advantage that a probe has, in that it can differentiate between a LOW and a HighZ state.

Because TTL and CMOS have different Logic LOW logic voltages
They do? That is news to me. I've always found both of their outputs to be zero volts. As for telling which family a part belongs to, you just look at it's part number.

For me, when looking at TTL and CMOS logic LOW state voltages , I can't tell if the output is Open, DEAD or a low state on an oscilloscope, how can you tell the differences?
A zero volt net is Zero volts. There is no way to tell why it's zero just from it's voltage.

Also why A logic probe is better at testing logic levels is because the logic probe has the perfect probe impedance for logic outputs VS an oscilloscope it as a 10meg ohm impedance which loads the logic output
10Meg loads a logic circuit? What family of logic are you working with? You might see a 100K resistor used as a pullup, though 10K is more common. How would 10Meg load that? And if the outputs are totem pole types, even a 10K load would not 'load' the net.

A Logic Probe has the Pulse Stretcher circuit so you can use it with a Logic Pulsar for troubleshooting
Since an Oscilloscope doesn't have a pulse stretcher circuit you "can NOT" view the logic pulsars microsecond waveshape in real time for troubleshooting using an logic pulsar right?
Depends on the speed of the scope. But it would have to be a v-e-r-y--- s-l-o-w scope not to be able to see a 1microSecond pulse.

As for comparing a logic probe with a scope, they both have their place. Simple problems I can find faster with a probe than with a scope because I can look at more pins in less time because my probe makes a tone that I hear instead of having to look back and forth between my board and the scope screen. But if I can't find the problem with the probe then I go at it with the scope. And if timing issues are the problem, then there is just no way that a probe will show that.

But in most cases either tool will just show you what the state of a pin is. You as the technician have to know what the state should be, to know it it's right or wrong.
 
Sounds to me like you are trying to repair unknown boards by testing every chip on them individually.
 
This is for all gates positive logic and negative logic
output Transistor ON = LOW logic level
output transistor OFF= HIGH logic level

Some gates ADD the inputs and other Gates Multiple the inputs

What determines the adding or Multiplying inside the GATE?

Because inside the gates the transistor or mosfet just turns ON or OFF , but what ADDs them or Multiplys the two inputs together to get an output?
What are you talking about?
MOST logic gates have TWO output transistors. One pulls the output HIGH and the other pulls the output LOW.
But you are talking about the few gates that have one NPN output transistor that is called "open collector" and it uses an external pullup resistor at its output.
When this single output transistor is turned on then you are correct by saying its output is low and when it is turned off then the output pullup resistor makes the output high.

The truth table for gates does not show when it is adding or multiplying the inputs. Instead the truth table says "When either or both inputs are .....".
 
The truth table for gates does not show when it is adding or multiplying the inputs. Instead the truth table says "When either or both inputs are ..
.

My manager said that's why they use the + and * signs because the inputs are either adding + or they are multiplying * to get the output

I never thought about it this way, why did they use the + and * signs than?

Sounds to me like you are trying to repair unknown boards by testing every chip on them individually.

Yes I am and I am trying to test every chip on them individually

A Logic Probe has the Pulse Stretcher circuit so you can use it with a Logic Pulsar for troubleshooting
Since an Oscilloscope doesn't have a pulse stretcher circuit you "can NOT" view the logic pulsars microsecond waveshape in real time for troubleshooting using an logic pulsar right?
Depends on the speed of the scope. But it would have to be a v-e-r-y--- s-l-o-w scope not to be able to see a 1microSecond pulse.

A Logic Pulsar Specifications
PULSE RATE = 0.5 pps or 400pps , what is pps mean? Pulse per second
PULSE WIDTH= 10 Nanoseconds
Output current is 100mA sink/source

What O-scope can Display 10 Nanoseconds in real time? I would have to use a DSO digital store scope and would have to STORE every single test point

Once you stored the 10 nanosecond waveform on the DSO, how do you get the PPS Pulse per second measurement? how do you find the pulse rate

I have measured pulse width, duty cycle, but how do you get the pulse rate?

0.5 pps = .5 hz?

Because TTL and CMOS have different Logic LOW logic voltages
They do? That is news to me. I've always found both of their outputs to be zero volts. As for telling which family a part belongs to, you just look at it's part number.

TTL logic Low is 0.75 vdc
CMOS logic Low is 15% of VCC or for 7 volts to 18 volts it's 40% of VCC

A Logic Probe detects the difference between the two because a Logic probe has a TTL /CMOS switch

An Oscilloscope for me is to had to tell because i have my O- scope input channel .5 or .1 on the knob and it picks up probe noise, O -scope is displaying so much noise because i'm trying to measuring millivolts when measuring logic LOWS.

When you trying to measure millivolts on the O-scope , it picksup to measuring noise and it display is hard to measure how much voltage is the Logic LOW , millivoltage at

And there is one advantage that a probe has, in that it can differentiate between a LOW and a HighZ state.

THANK YOU for notice this too

On a O-scope I can't tell the difference between a Low state, is the output dead , or a HighZ state = floating

A Floating input or output = High Z = Tri-state

or is a Floating input or output High Z?
or is Tri-State different than a High Z?


It stretches a pulse to short for you to see into one that is long enough for you to see. A 10nS pulse might be stretched into a 10mS LED flash or tone. See the datasheet of the probe you are using for it's exact behavior.

Yes I know, but how does it convert or stretch the 10nSec. into a 10mS? it's a time delaying circuit? sample and hold
 
Output current of a Logic Pulse is 100mA sink/source

AudioGuru keeps talking about how 100mA ADDED onto a HIGH logic State of a TTL or CMOS would just kill it's output from overloading it

because you're adding 100mA ontop of the logic High state's sink or source output current
 
What do you mean by "dead"? Shorted to ground? Shorted to the positive supply? Disconnected?
I mean the IC chip internally has a dead output, or dead output stage inside the IC chip which outputs a zero volt potential , it's not a short or open or hi Z , it's just zero volt potential


A TTL input needs up to 1.6mA to make it low so when it is connected to a disconnected output it floats high.
A Cmos input draws no current so when it floats it could be low, high or in between.

When A Cmos input is floating , how do you measure it with a DVM meter? or do I use the ohms range?

Cause there is floating low, floating high and inbetween

Floating Low is different than a Logic Low , what's the difference?

Floating High is different than a Logic High, what's the difference?

When Either A Floating Low or High measures a voltage on the input or output of a Gate might trick you because it measures just like a real logic level voltage but it's floating which means it's not referenced to ground or so it's floating the input pins which tricks the Gates to output a result

I have many circuit boards like this at work that I can't find out why something is not working is because there is floating inputs and outputs that trick the logic gates , flip flops ,etc

Hi Z means high impedance so I use my DVM meter set on ohms range right? to measure a logic Hi Z state?
 
Zero potential implies a reference. Take any IC, place it in midair with one probe in air, all the pins are at zero potential.

High Z basically means the gate is not turned on. An ohmmeter is nearly useless.
 
Billy.
Instead of guessing, you should look at and memorize the spec's that are printed on datasheets:
1) For a 74xx TTL ordinary output, the maximum logic low voltage is 0.4V (not 0.75V that you said) when it has its maximum allowed load of 16mA. It is typically 0.2V and is less when it drives only one or two TTL inputs.
You do not set a 'scope to show millivolts, set it for 1 volt per division then 0.4 divisions or less is easy to see
.
2) For a CD4xxx Cmos ordinary output, the maximum logic low voltage is 30% of the supply voltage for most supplies but is a little less with a 15V supply.

You do not understand what a "dead output" is.
You do not understand what a "floating input" is.
You do not understand what a "tri-state output" is.
You do not understand what "zero potential" is.
 
the maximum logic low voltage is 0.4V

A TTL or CMOS logic low is not zero volts , it's in the millivolts like 0.012 , 0.4 vdc

Why do u think a logic low is zero volts?

Zero volts is a dead output stage internally inside the logic chip
 
I have circuit boards at work that have logic stages that has there logic gate outputs either high or low logic state , from a Floating input

How can a floating input cause a Logic gate output to go high or low?

Can a floating input measuring close to zero volts?

isn't Hi-Z = zero volts or millivolts?
 
. My manager said that's why they use the + and * signs because the inputs are either adding + or they are multiplying * to get the output

I never thought about it this way, why did they use the + and * signs than?
What parts are you talking about here? There are MSI parts that do math functions, but they are not simple gates.

I would have to use a DSO digital store scope and would have to STORE every single test point

Once you stored the 10 nanosecond waveform on the DSO, how do you get the PPS Pulse per second measurement? how do you find the pulse rate

I have measured pulse width, duty cycle, but how do you get the pulse rate?

0.5 pps = .5 hz?
If you want to see multiple points at the same time, then you need a logic analyzer.

0.5pps means it takes 1 second for half a pulse, so it will take 2 seconds for a complete pulse.

TTL logic Low is 0.75 vdc
CMOS logic Low is 15% of VCC or for 7 volts to 18 volts it's 40% of VCC

A Logic Probe detects the difference between the two because a Logic probe has a TTL /CMOS switch
I thought we were talking about output voltage levels, not input voltage thresholds. And a logic probe doesn't tell you which is which. The switch just lets you change the threshold level that the probe uses to decide the high or low state. But the voltage that it is looking at has to come from the OUTPUT of the driving device. The only way to actually test what the input threshold is is to use a variable power supply. Start at zero volts and raise it up until the output changes state. The voltage at the input when the change occurs is the threshold voltage.

An Oscilloscope for me is to had to tell because i have my O- scope input channel .5 or .1 on the knob and it picks up probe noise, O -scope is displaying so much noise because i'm trying to measuring millivolts when measuring logic LOWS.
When using a scope to look at logic you don't care about millivolt levels. For TTL a LOW is anything less than .7 Volts and a HIGH is greater than 2 Volts. For CMOS the levels are ~ half of the Vcc level. Just set the scope channel level for something around 2 to 5 Volts per division. Maybe 10V for high voltage CMOS

Yes I know, but how does it convert or stretch the 10nSec. into a 10mS? it's a time delaying circuit? sample and hold
The probe probably uses a one shot multivibrator. It wouldn't use a sample and hold circuit, as they are generally used for analog measurements, not digital ones.

As for floating inputs. TTL and CMOS behave differently when their inputs are left floating. TTL inputs usually default to a low input. The output state will be whatever it would be if that input were actively driven low. So a floating input on an inverter will cause the output to be high.

CMOS inputs should never be left floating. A floating CMOS input will be uncontrolled, and therefor, can be anything. It may act high, low, or it may oscillate.

In a properly designed circuit, all CMOS inputs controlled, either by connecting them to the output of another chip, or tied directly or through a resistor to gnd or Vcc.

A logic 1 on a HighZ output is effectively floating, but should never be left that way. Add a pullup resistor to give it a default level when all of the outputs in the net are HighZ.
 
ChrisP58 said:
TTL inputs usually default to a low input.

Nope. Unconnected TTL logic inputs defaults to a HIGH.

ChrisP58 said:
A logic 1 on a HighZ output is effectively floating, but should never be left that way. Add a pullup resistor to give it a default level when all of the outputs in the net are HighZ.

An output can stay High Z as long as it wants to and "A logic 1 on a HighZ output is effectively floating" makes no sense.
 
0.5pps means it takes 1 second for half a pulse, so it will take 2 seconds for a complete pulse.

How do you measure the PPS of a pulse? so you measure Half the pulse that is in 1 second? how do u do that and why do you want to measure half the pulse in 1 second i don't get it

I thought we were talking about output voltage levels, not input voltage thresholds. And a logic probe doesn't tell you which is which. The switch just lets you change the threshold level that the probe uses to decide the high or low state. But the voltage that it is looking at has to come from the OUTPUT of the driving device.

So does the Logic Probe TTL/CMOS switch do anything, since the driving device output voltage levels are not the threshold levels?

The switch just lets you change the threshold level that the probe uses to decide the high or low state
.

But the Driving Device output are not the threshold levels so the Logic probe switch does nothing to tell you if it's thresholds are good or not right?
 
At work I have circuit boards that have a Floating Cmos inputs, but the outputs of the Cmos gates are HIGH

It's really weird how the circuit board works when there is a Floating input on the CMOS , but it won't work when I apply a logic HIGH or LOW , it only works when I apply a Floating input

How I apply a floating input is i disconnect or lift up a component or pin that is driving the Cmos input , than the circuit board works

It doesn't make sense to me how a floating input will make the circuit board work but not a Logic High or Low

The Cmos Logic Gate does go to a Cmos Decoder to a Cmos Flip Flop to a LIGHT
 
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