Hi!
I am thinking of using a SPI slave (a flash memory) with two SPI masters, one MCU and another IC acting as SPI master. Not on the same time of course. When the one master is on power, the other will be out of power and vice-versa. No MUX will be used for any line (MOSI, MISO, CS#) of the SPI bus.
Do you think that this will cause any trouble? For example, when the MCU operates, the MOSI line will be active (transmitting commands to the memory). Is this a problem for the MOSI pin of the other in-active master? Because data will be transmitted to a pin normally considered as an output.
I am thinking of using a SPI slave (a flash memory) with two SPI masters, one MCU and another IC acting as SPI master. Not on the same time of course. When the one master is on power, the other will be out of power and vice-versa. No MUX will be used for any line (MOSI, MISO, CS#) of the SPI bus.
Do you think that this will cause any trouble? For example, when the MCU operates, the MOSI line will be active (transmitting commands to the memory). Is this a problem for the MOSI pin of the other in-active master? Because data will be transmitted to a pin normally considered as an output.