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Two SPI masters with a single SPI slave

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nickagian

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Hi!

I am thinking of using a SPI slave (a flash memory) with two SPI masters, one MCU and another IC acting as SPI master. Not on the same time of course. When the one master is on power, the other will be out of power and vice-versa. No MUX will be used for any line (MOSI, MISO, CS#) of the SPI bus.

Do you think that this will cause any trouble? For example, when the MCU operates, the MOSI line will be active (transmitting commands to the memory). Is this a problem for the MOSI pin of the other in-active master? Because data will be transmitted to a pin normally considered as an output.
 
The protection diodes are still in place on all general purpose pins, even when power is removed. The other active device will try to power it through these diodes, probably unsuccessfully.

The result will be that the logic high on the MOSI line may only reach 1V instead of 5V.
 
It sounds logic... and what do you suggest to do? Use MUXes perhaps? Any other idea maybe?
 
Why not just have one master?
 
I just can't. The system under development will periodically capture data from sensors and store them to the memory. The MCU will be the master during these transactions. However, the data will be retrieved through a RFID wireless link. And during this procedure, a different IC will act as a SPI master, read the data saved to the memory and then send them to the RFID reader. Thus, I just can't use one master.
 
Could you not implement I²C instead. This allows multi master without and problems.

Mike.
 
If a chips I²C I/O pins have protection diodes, they will still drag the bus down when their power is off.
 
Knowing the part numbers of the SPI devices would be nice.
 
If a chips I²C I/O pins have protection diodes, they will still drag the bus down when their power is off.

There would no longer be any need to power off one or other device. Just power the whole circuit.

Mike.
 
You could isolate the outputs using a tri-state buffer. https://www.electro-tech-online.com/custompdfs/2010/05/cd74hct368-1.pdf
You would have to arbitrate the buss using the enable lines to decide who gets the slave. The logic is simple if one chip is the "head" master and tells the "sub" master when to talk.

That sounds good and this is perhaps what I will implement. The logic is indeed simple.


Could you not implement I²C instead. This allows multi master without and problems.

Mike.

I know that I2C was perhaps a better solution, but unfortunately, only SPI is available.


Knowing the part numbers of the SPI devices would be nice.

Well, the SPI memory is the N25Q128 from Numonyx, the MCU is the MSP430F5438 and the second SPI master is the MLX90129.

If the whole circuit can be powered all the time, then SPI would have no problem.

Do you think that if I can power both SPI masters all the time, then no problem would exist? Because this is something that I could probably do. But again, I think that the use of tri-state buffers would be better.
 
Well it looks like the RFID device can be configured as a slave so I don't understand why you don't have it slave and MCU as master. Maybe I am not getting the big picture.
 
Well it looks like the RFID device can be configured as a slave so I don't understand why you don't have it slave and MCU as master. Maybe I am not getting the big picture.

I would like the RFID device to read from the Flash memory and the commands to be sent by the RFID reader. Since the memory is a SPI slave, the RFID device should be configured as SPI master. If MLX90129 becomes a slave, how could it retrieve the data from the memory?
 
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Perhaps you could have the MCU retrieve data from the memory device and pass it on to the RFID device. I have not read your data sheets in detail but that would be an approach I would look at.
 
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Hi!

I am thinking of using a SPI slave (a flash memory) with two SPI masters, one MCU and another IC acting as SPI master. Not on the same time of course. When the one master is on power, the other will be out of power and vice-versa. No MUX will be used for any line (MOSI, MISO, CS#) of the SPI bus.

Do you think that this will cause any trouble? For example, when the MCU operates, the MOSI line will be active (transmitting commands to the memory). Is this a problem for the MOSI pin of the other in-active master? Because data will be transmitted to a pin normally considered as an output.

diode or the two masters' clock and data out lines
 
Good idea, but I'm afraid of the voltage drop on the diodes and the problems this may cause... Of course the currents are probably not so big.
 
hi

hi,
can any body suggest how to use external memory in EVB90129 evalution board, because i am using mlx90129 as standard alone data logger. i am reading values from internal memory when mlx90129 acts as datalogger by using spi communication. my MCU is ATMEGA168. can any body suggest how can i log data from external memory.i uploaded my datasheets also. which commands is helpful for me and i am using hyperteminal.
 

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hi veerubiji,

I am using the same evaluation board and the MLX90129 IC too, but I am afraid I haven't understood your question.

- What do you mean by internal and external memory?
- And what do you want to do exactly? What do you mean by "loging data from the external memory"?
- And what about the hyperterminal? How are you using it?

Nikos
 
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