electroRF
Member
Hi,
I'm wondering about the following timing diagram from Wikipedia (SPI term), regarding SPI Mode 0,0:
in SPI Mode 0,0, the data is transmitted at falling edge.
Therefore, how come in the diagram, the first falling edge (in CPOL = 0) occurs just before bit #2 is transmitted? (in CPHA = 0)
I expected the first falling edge to occur just before bit #1 is transmitted.
How come the 1st bit was transmitted before the first falling edge?
thank you.
I'm wondering about the following timing diagram from Wikipedia (SPI term), regarding SPI Mode 0,0:
in SPI Mode 0,0, the data is transmitted at falling edge.
Therefore, how come in the diagram, the first falling edge (in CPOL = 0) occurs just before bit #2 is transmitted? (in CPHA = 0)
I expected the first falling edge to occur just before bit #1 is transmitted.
How come the 1st bit was transmitted before the first falling edge?
thank you.
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