PWM Frequency

[kinarfi]

On an earlier thread, FET Killer, we got into proper PWM Frequency for driving a motor some what. It was suggested to stay above ~ 20KHz so you wouldn't hear the buzz from the PWM frequency, It was also said that the LM339 I'm using may not drive the big power FET into saturation fast enough creating heat by being in linear region for too long.
My thoughts on this is that the more times you pass through the linear area per second, the more heat generated, for example, if you run at 1 hz, and take 1 msec to saturate, you will create 1/10 the heat of running at 10 hz. Change these number to real life scenarios of something like operating at 1 KHz instead of 20 KHz and you have 1/20th of the heat. Other than being able to hear the motor buzz at a 1 KHz frequency, if you're close enough to hear it, are there any other factors to consider?
Hope we can have a good discussion on this.
Kinarfi

 

[smanches]

I would say you should typically be able to get at least a 100ns switching time from your mosfets. Although you will need good mosfet drivers to get that fast. It takes a lot of current to charge the gate fast enough.

For motor controls, I can't really think of much else that would affect frequency. Obviously in other switching circuits, it reduces inductor size, which is beneficial. But since a motor is spec'ed for what it's used for, higher switching speeds don't really do much. I remember the one argument about lower speeds having more torque, but the rebutal was that a proper feedback and compensation can take care of that.

FYI, for mosfets you don't want to be in the saturation zone, but as high in the linear zone as you can be. ( I guess it depends on what chart you're looking at) But saturation in a mosfet starts limiting current, so it's not good to be there.

 

[Sceadwian]

The frequency itself isn't that much of an issue if you have a good driver. The gate of a mosfet acts as a capacitance so the impedance of the voltage source that is turning it on will effect how fast it turns on, it is VERY important. Your asumption that 20 times the frequency is 20 times the power is not true. In order to determine power lost while the FET is in the linear region you have to determine how long it spends in there which requires a scope and some modest math. The best way to limit switching time is to use as high a voltage as is possible without damaging the FET gate and has low a source impedance as possible as well. Higher voltage will charge/discharge the gate capacitance faster and low impedance will allow the charge to dissipate or grow faster as well.

 

[kinarfi]

smanches, Sceadwian, I agree with what you guys say, and saturate may have been the wrong choice of words, But what I want to discuss is the effects of high vs low frequencies on a power FET. As I see it, the power dissipated in a power FET is Rds times the current squared times the on % of the PWM + power generated during the linear part of the cycle during turn on and off. At 1KHz, you have the Rds power + 1000 "linear" pieces and since, I assume, each linear piece is basically the same, at 20KHz you will have the same Rds power + 20000 pieces of linear power.
On the attached drawing, would you indicate what you call the different parts of the wave form if different from what I called it.
Thanks

 

[crutschow]

Your are correct in that, for a given switch rise and fall times, the higher the PWM frequency, the higher the switching loss in the MOSFET. But if the MOSFET gate is driven such that the rise and fall times are a minimum, then this loss is a small part of the total dissipation, most of which is due to the MOSFET on resistance, even at a higher switching frequency.

 

[smanches]

One question I've always asked myself: At what percentage of the total PWM period would be the maximum switching time you would want?

Is using 1% of your PWM period for switching too much? 5%? .05%?

The only two benefits I can see for raising frequency is smaller component sizeand maybe easier filtering. Did I miss anything? I've only had one cup of coffee so far.

Does the inductance of a motor change once it starts spinning?

Kinarfi, you can't see saturation in most waveforms like that. It actually takes pretty specific drain-source and gate-source voltages to get into the saturation region. Most switching circuits will never go into the saturation region because of this. The higher the gate voltage, the wider the linear region gets (and hence less Rds_on) which also shrinks the saturation region at the same time. Took me weeks of reading to finally understand it.

 

[crutschow]

One question I've always asked myself: At what percentage of the total PWM period would be the maximum switching time you would want?

Is using 1% of your PWM period for switching too much? 5%? .05%?

The only two benefits I can see for raising frequency is smaller component sizeand maybe easier filtering. Did I miss anything? I've only had one cup of coffee so far.

The percent switching time you want is really determined by power dissipation considerations. You need to calculate the switching power and decide how much switching power you can tolerate as compared to the resistive loss from the transistor on resistance.

You can approximate the switching loss by multiplying the switch transition time by the maximum switch voltage and current times the switching frequency (P = Ts x V x I x F).

 

[smanches]

The percent switching time you want is really determined by power dissipation considerations. You need to calculate the switching power and decide how much switching power you can tolerate as compared to the resistive loss from the transistor on resistance.

You can approximate the switching loss by multiplying the switch transition time by the maximum switch voltage and current times the switching frequency (P = Ts x V x I x F).

Yea, that makes more sense to make it a function of power dissipation than frequency.

 

[Sceadwian]

In some respects what you're saying is true, given low vs high frequency low is likley going to be better at reducing power dissipation in the linear region, however this is not generally major problem just something you need to take into account. Simply switching to a better mosfet that is capable of extremely fast switching can completly eliminate the problem and the frequency required for a given application can be VERY different. For motor PWM'ing you have audible noise considerations, which I do agree with you I think are a bit over stated. However you have responce time issues to consider as well, a higher frequency will allow faster responce time, so for something like a Class D amplifier higher switching speeds are an absolute requirement.

I don't know if the graph you displayed is from your actual circuit but it's not good. See how crisp and sharp that turn ON phase is? A better mosfet driver should be able to get that linear slope during turn off to go away, rise and fall times on a MOSFET should be symmetrical so it's probably a deficiency in the gate driver.

 

[kinarfi]

FYI that was a P FET so it had to be an IRF4905, 40us/div and 2v/div ---- 4 1/2 div @ 40 usec =180 us 1/180us= 5555Hz

Thanks for the inputs