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mplabx wont debug

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Dr_Doggy

Well-Known Member
mplabx v3.35
from old project i have code for pic18f4620, i forget how i was compiling it...but c18 seems to build with no errors, however when i try to debug i get message "failed to program"... an thats it...

checked the top 10 reasons:
its getting power
every build works
watchdog is off
lvp is off
no code protect at all
mclr is on
internal clock is setup
in this ver of mplab there is no debug/release setting, only "build and upload" and "debug main project" buttons

cant figure out what , but its gonna be a little setting in software..... ideas?


Code:
//#pragma config OSC=INTIO67, WDT=OFF, LVP=OFF     // old settings

#include <p18f4620.h>
 
// CONFIG1H
#pragma config OSC = INTIO67  // Oscillator Selection bits (Internal oscillator block, port function on RA6 and RA7)
#pragma config FCMEN = OFF  // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF  // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)

// CONFIG2L
#pragma config PWRT = OFF  // Power-up Timer Enable bit (PWRT disabled)
#pragma config BOREN = OFF  // Brown-out Reset Enable bits (Brown-out Reset disabled in hardware and software)
#pragma config BORV = 3  // Brown Out Reset Voltage bits (Minimum setting)

// CONFIG2H
#pragma config WDT = OFF  // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
#pragma config WDTPS = 32768  // Watchdog Timer Postscale Select bits (1:32768)

// CONFIG3H
#pragma config CCP2MX = PORTC  // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = ON  // PORTB A/D Enable bit (PORTB<4:0> pins are configured as analog input channels on Reset)
#pragma config LPT1OSC = OFF  // Low-Power Timer1 Oscillator Enable bit (Timer1 configured for higher power operation)
#pragma config MCLRE = ON  // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)

// CONFIG4L
#pragma config STVREN = OFF  // Stack Full/Underflow Reset Enable bit (Stack full/underflow will not cause Reset)
#pragma config LVP = OFF  // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
#pragma config XINST = OFF  // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))

// CONFIG5L
#pragma config CP0 = OFF  // Code Protection bit (Block 0 (000800-003FFFh) not code-protected)
#pragma config CP1 = OFF  // Code Protection bit (Block 1 (004000-007FFFh) not code-protected)
#pragma config CP2 = OFF  // Code Protection bit (Block 2 (008000-00BFFFh) not code-protected)
#pragma config CP3 = OFF  // Code Protection bit (Block 3 (00C000-00FFFFh) not code-protected)

// CONFIG5H
#pragma config CPB = OFF  // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
#pragma config CPD = OFF  // Data EEPROM Code Protection bit (Data EEPROM not code-protected)

// CONFIG6L
#pragma config WRT0 = OFF  // Write Protection bit (Block 0 (000800-003FFFh) not write-protected)
#pragma config WRT1 = OFF  // Write Protection bit (Block 1 (004000-007FFFh) not write-protected)
#pragma config WRT2 = OFF  // Write Protection bit (Block 2 (008000-00BFFFh) not write-protected)
#pragma config WRT3 = OFF  // Write Protection bit (Block 3 (00C000-00FFFFh) not write-protected)

// CONFIG6H
#pragma config WRTC = OFF  // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF  // Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)
#pragma config WRTD = OFF  // Data EEPROM Write Protection bit (Data EEPROM not write-protected)

// CONFIG7L
#pragma config EBTR0 = OFF  // Table Read Protection bit (Block 0 (000800-003FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF  // Table Read Protection bit (Block 1 (004000-007FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF  // Table Read Protection bit (Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF  // Table Read Protection bit (Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks)

// CONFIG7H
#pragma config EBTRB = OFF  // Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks)






#include <delays.h>

The following memory area(s) will be programmed:
program memory: start address = 0x0, end address = 0xfd3f
configuration memory

Device Erased...

Programming...
Failed to program device
 
Hi Doc , Not done a lot with PIC18 , but whats the PGM pin doing ,

in this ver of mplab there is no debug/release setting, only "build and upload" and "debug main project" buttons
Think the solid Green left arrow < is release build ..
 
ohya, pickit3...

i think there are separate buttons for debug/release as far as i recall using it last time, this is a new install of mplabx but old code, so it is most likely one of those small settings somewhere, actually not even sure its the right compiler!? (the first line commented out was the pragma i originally was using, imported the new ones to ensure code protect was off)
 
I haven't really gotten to grips with MPLABX... But I bet it's to do with pickit3.... If it compiles then the compiler is working... The trouble you are having is the pickit3 cannot upload the firmware.. So!! Make sure the power is set right.. Ensure if you are powering from the pickit3 that there isn't too much power required from your circuit... Also read the debug info to make sure that pickit3 can debug your chip.. Last time I saw this ( with MPLAB 8 ) was that pickit3 was set to a voltage that was too low.... If it's a 5v device then set pickit3 to 5v..... Sometimes it gets stuck at 3.3v..
 
its very strange, since it uploads ok on build, problem is only in debug.
pic18f4620 is debug able , and i think i also recall using it before...think

I did initially have a voltage mismatch problem, it gave me alerts when it was under, it seems that the pickit is no longer able to pull all the way up to 5v, but 4.75 is ok... maybe pickit3 is bad(going). but I am now running on the external supply which eliminates volt errors.

.... so maybe it is in the hardware
also just tested on a 18f2550 demo board , that seems to work so its not the pickit itself?

I recall at one time i had a loose connection on the icsp bus for this circuit, but i dont think its that since build uploads work, plus clk and dat signals are looking ok on the scope during debug uploads

swapped the chip... not that...
put a bad chip in there ... no address returns indicating error... another sign that data is getting through on the good chip

new chip using blinky code and #pragma posted above... still no good

chip on breadboard, internal power, no extra hardware .... does not work


?

More complete output data:
Code:
Connecting to MPLAB PICkit 3...

Currently loaded firmware on PICkit 3
Firmware Suite Version.....01.43.35
Firmware type..............PIC18F

Programmer to target power is enabled - VDD = 4.750000 volts.
Target device PIC18F4620 found.
Device ID Revision = 7

The following memory area(s) will be programmed:
program memory: start address = 0x0, end address = 0xfd3f
configuration memory

Device Erased...

Programming...
Failed to program device
 
Looks like some sort of bad contact, bad power, not all VDD/VSS connected etc.

Also, it's good idea to connect PGM pin to the ground anyway. After erase, all the chip memory, including config, will become all 1, which means LVP enabled. In such situation, the PGM pin can put the chip into LVP programming mode before PICkit3 starts its programming.
 
to recap:,
works when programming(uploading) in build,
doesnt' work when programming(uploading) in debug,

nothing else on ports B6 & 7, now running on a empty breadboard, 5wires only,,,.... plus PGM bus is now pulled to ground

#pragma config DEBUG = ON // noticed this wasnt included in config bits either
#pragma config STVREN = ON //lol, didnt know exactly what it was so i shut it off!

..... added 10k pull-up resistor to mclr


still no go:( ,
 
You shouldn't set DEBUG = ON - MPLAB X will do it for you. The best is to simply omit it.

Can you post 2 outputs:

- the successful programming

and

- unsuccessful debug
 
for build, i click on the green arrow pointing down:

upload_2016-8-26_20-2-16.png




for debug, I click first button to left of the shopping cart:

upload_2016-8-26_20-4-15.png
 
There shouldn't be a difference to that point. The only difference I see is the address range is different "0 to 0x17f" vs "0 to 0xfd3f" - looks like it adds the debug executive code at the end. For some reason programming the longer range fails. May be upper regions of memory are damaged on your PIC. Have you tried others?

If it's consistently the same problem and the same happens with different chips, there might be some sort of bug in PICkit3. Who knows. I would try to report the problem to Microchip. They have a support system. You need to register and log the support ticket.
 
Hi doc, I click the big green arrow > for a release build and program the chip ( think I got my left and right confused previously ! ) the Debug build is left of cart... as you said, have you set the project config , correct device ? other things that upset the ICSP ...long wires... extra capacitance on clock / data . missing Vdd Vss or AVdd AVss connections and or .1uF caps missing .Supply voltage ( I always use external power ). Pin 6 of the PK3 ICSP should be open .. the fact a dev board works suggests a problem with your ICSP layout. Cannot see on your shots where MPLABX / PK3 has detected the PIC and info about FW versions / voltage etc .
You probably know all that .
 
the development board does work , build and debug ok ... but i use a different pic on it... the 18f2550
the 4620 is on breadboard and using BLINKY code, with a new 4620 chip,

I am guessing we get closer by moving away from hardware issues, I am suspicious of firmware version, cause it did update after the new install, maybe i should roll it back? how far?
also i chose the right pic for each, ...but there may be other settings i didnt do right in that whole thing,
... I thought that too, maybe something about memory range, but the CUBE code is large so then that would error too if it was bad block, even on build...

.... maybe it is time to go see microchip...

sorry , idk how that happened! .... it didnt get cut off, it just didnt display that time!

Code:
BUILD:

Connecting to MPLAB PICkit 3...

Currently loaded firmware on PICkit 3
Firmware Suite Version.....01.43.35
Firmware type..............PIC18F

Programmer to target power is enabled - VDD = 4.750000 volts.
Target device PIC18F4620 found.
Device ID Revision = 7

The following memory area(s) will be programmed:
program memory: start address = 0x0, end address = 0x17f
configuration memory

Device Erased...

Programming...
Programming/Verify complete




DEBUG:



PICkit 3 removed

PICkit 3 connected

*****************************************************

Connecting to MPLAB PICkit 3...

Currently loaded firmware on PICkit 3
Firmware Suite Version.....01.43.35
Firmware type..............PIC18F

Programmer to target power is enabled - VDD = 4.750000 volts.
Target device PIC18F4620 found.
Device ID Revision = 7


The following memory area(s) will be programmed:
program memory: start address = 0x0, end address = 0xfd3f
configuration memory

Device Erased...

Programming...
Failed to program device
 
Try external 5v power perhaps ? ... also a BB picture may help...
 
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