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Learning DipTrace

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djsfantasi

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Spent my Sunday afternoon trying to learn DipTrace. I felt like a Windows person trying to learn Linux. We can dismiss the vagaries of the UI; I'll never figure out why it keeps switching into draw connector mode on ts own... Like a demon, it was. I had unwanted traces all over my schematic.
No. what got me was trying to use the verification tool. I was shocked to see a two page error list. And being unfamiliar with the notation, it took me a while to grok even where an error occurred. I did eventually learn if you double clicked the error,something became highlighted in red, but it took me a little while longer to find the problem. It started with na easy one, once I found on. I lucked upon it, since there were so many errors. I could see a gap between my connections!
I was convinced I couldn't see any other errors! Then I changed my perspective. Lets assume there is no connection I separated the components and connected them with a short trace. Voili! It appears DipTrace doesn't like two components connecting directly together; you have to draw a line between the terminus points for the program to understand what you want.

Am I crazy? Has anyone else had this problem?

Then I went into routing. And gave up for the night. It seems Diptrace cannot count. My schematic had 4 DIP chips... The PCD DipTrace produced had twelve chips. Twelve! Even if you counted the individual gates, you don't get twelve. ..

Are these anomalies typical?

I've attached the schematic in a zip file.
 

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  • Lockout.zip
    15.3 KB · Views: 241
I haven't had these problems, and successfully used DIPTrace to make boards. I found it much easier than KICAD. It sounds like maybe you had unseen pages in the schematic somewhere. I like Diptrace a lot!
 
djsfantasi
Have you used Eagle? That is not a recommendation, just a question.
In this Eagle example, "A" gives no error, "B" gives a non-junction error ("overlap").
upload_2016-2-4_11-32-45.png

If you pull the transistors in A apart, there is a net between the emitter and collector that was formed (but invisible to the user) when the two pins were positioned to touch. In B, the pins were intentionally overlapped and no implied connection was made. Diptrace is widely used and liked. I am surprised it does not have a similar functionality. Were all pertinent layers visible when you did the schematic? Are you sure it was not an overlap problem?

Sorry if my questions/advice is well off target. I am just assuming that such a function should be common.

John
 
All layers were visible. All connections between components resulted in two errors in the error list; one for each component. The error was something about "no connections". The errors disappeared when I separated them a bit and connected the pins with the wire tool. I may have made a mistake prior to that (I had been using DipTrace for all of 30 minutes), but don't know what/how.
 
I could not find an online demo, and as much as I would like to help, I don't plan to install DipTrace. There is no additional setting needed in Eagle to get the automatic connection. There is a difference in Eagle between the "wire" and "net" commands. Generally, the net is preferred for connecting components; although, that would have no effect on my results here, as I am using the "move" command to try to duplicate the problem.

Maybe there is an answer on the DipTrace forum.

Regards, John
 
What is your grid setting? It just occurred to me that if I were using a very fine grid setting in Eagle, I could get an overlap (non-junction) that would look like a touch. My typical grid is 0.1", so any overlap is really obvious to the user.

John
 
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