Junebug VR1 and VR2 strangeness

[futz]

I've written a program for Junebug that reads VR1 and VR2 and outputs the results to RS232. What I'm finding is that adjusting either one is affecting the value of the other, which shouldn't really happen. (Hope I don't find it's caused by coder error ) They're not identical, so it's not that. It's just that when I change one the other changes too.

Is this because adjusting the pots is affecting my reference voltage, which is VDD/VSS? And, if so, is it because of the USB power limit?

 

[blueroomelectronics]

You must wait for the A/D to aquire when switching sources.

 

[futz]

You must wait for the A/D to aquire when switching sources.

I put a giant delay in between reads and it still does it.

analog	bcf	ADCON0,CHS2		;select analog channel 1
	bcf	ADCON0,CHS1
	bsf	ADCON0,CHS0
	bsf	ADCON0,GO		;go do a/d conversion
adloop	btfsc	ADCON0,DONE
	goto	adloop
	movff	ADRESH,temp		;get the value in temp
	tstfsz	temp			;is it 0?
	goto	stor1			;yes, go put it in spdvr1
	incf	temp,F			;no, make it 1
stor1	movff	temp,spdvr1		;put it in spdvr1
		
	call	delay

	bcf	ADCON0,CHS2		;select analog channel 3
	bsf	ADCON0,CHS1
	bsf	ADCON0,CHS0
	bsf	ADCON0,GO		;go do a/d conversion
adloop2	btfsc	ADCON0,DONE
	goto	adloop2
	movff	ADRESH,temp		;get the value in temp
	tstfsz	temp			;is it 0?
	goto	stor2			;yes, go put it in spdvr2
	incf	temp,F			;no, make it 1
stor2	movff	temp,spdvr2
	return

 

[eblc1388]

What I'm finding is that adjusting either one is affecting the value of the other, which shouldn't really happen.

It helps to narrow down the problem a lot if you have given information "by how much" or gives the actual ADC values before and after changing another channel.

Possible suggestions for a 1% variation is also much different from a 20% variation.

 

[futz]

It helps to narrow down the problem a lot if you have given information "by how much" or gives the actual ADC values before and after changing another channel.

Possible suggestions for a 1% variation is also much different from a 20% variation.

OK then, here's some data:

At rest with both pots full CW (clockwise):

VR1	VR2
$d3	$de
$d1	$d9

Adjusting VR1 from full CW to full CCW with VR2 full CW:

VR1	VR2
$d9	$e0
$c6	$e3
$0c	$49
$04	$48

Adjusting VR2 from full CW to full CCW with VR1 full CW

VR1	VR2
$d3	$b1
$cf	$ae
$cc	$ac
$40	$0c
$3e	$07
$3c	$01

 

[blueroomelectronics]

Here's a quick test for use with the debugger. Seems to work fine.
Set a breakpoint at bra Start and watch VR1, VR2

;*** VR1 / VR2 debug test DIP 1,2,3,7,8 on
    list    p=18F1320
    include    <p18f1320.inc>
    CONFIG    OSC=INTIO2,WDT=OFF,LVP=OFF
VR1    =    0
VR2    =    1
    org    0
    movlw    62h
    movwf    OSCCON        ; 8 MHz
; VR1 (RA1)
Start    movlw    b'00000101'    ; enable A/D, AN1
    movwf    ADCON0        ;
    nop
    nop
    bsf    ADCON0, GO
    btfsc    ADCON0, GO
    bra    $-2        ; wait till A/D complete    
    movff    ADRESH, VR1
; VR2 (RA3)
    movlw    b'00001101'    ; enable A/D, AN3
    movwf    ADCON0        ;
    nop
    nop
    bsf    ADCON0, GO
    btfsc    ADCON0, GO
    bra    $-2        ; wait till A/D complete    
    movff    ADRESH, VR2
    goto    Start
    END

Full clockwise 0xFF, 0xFF

Edit Hmm
CW VR1 = 0x8F
CCW VR2= 0x00

But in animate mode the results are 0xFF & 0x00 (correct)
Seems to indicate a delay is needed somewhere.

 

[futz]

I need to learn to use the debugger. All I've ever got from it is "PK2Error0028: Unable to enter debug mode" and "PK2Error0040: Operation not supported for current device".

Time to RTFM I guess.

I put the parts of your code that are different from mine in mine like this:

analog	movlw	b'00000101'		; enable A/D, AN1
	movwf	ADCON0
	nop
	nop
	bsf	ADCON0,GO		;go do a/d conversion
adloop	btfsc	ADCON0,DONE
	goto	adloop
	movff	ADRESH,temp		;get the value in temp
	tstfsz	temp			;is it 0?
	goto	stor1			;yes, go put it in spdvr1
	incf	temp,F			;no, make it 1
stor1	movff	temp,spdvr1		;put it in spdvr1
		
	movlw	b'00001101'		; enable A/D, AN3
	movwf	ADCON0
	nop
	nop
	bsf	ADCON0,GO		;go do a/d conversion
adloop2	btfsc	ADCON0,DONE
	goto	adloop2
	movff	ADRESH,temp		;get the value in temp
	tstfsz	temp			;is it 0?
	goto	stor2			;yes, go put it in spdvr2
	incf	temp,F			;no, make it 1
stor2	movff	temp,spdvr2
	return

And... No change.

Oh! Now I've got it working. Debug, that is. No change in the program yet.

 

[Pommie]

Futz,

The delay has to go between selecting the channel and setting the Go bit. The two NOPs just don't cut it.

Mike.

 

[futz]

Futz,

The delay has to go between selecting the channel and setting the Go bit. The two NOPs just don't cut it.

Mike.

That's got it. Thanks Mike! Good to know that.

 

[blueroomelectronics]

Too bad there is no flag for A/D ready.

 

[Pommie]

You can use the built in acquisition delay. Setting ADCON2 to b'10111101' should work.

Mike.

 

[blueroomelectronics]

You can use the built in acquisition delay. Setting ADCON2 to b'10111101' should work.

Mike.

I'll have to read up on how that works. Does it automatically delay the GO/DONE bit till the A/D is ready?

 

[Pommie]

It waits a set amount of time. In the above case, 320 instructions worth.

Mike.

 

[futz]

It waits a set amount of time. In the above case, 320 instructions worth.

Mike.

OHHHHH!!! That's what that stuff in ADCON2 is for! I didn't understand it and hadn't read part 17.3 of the datasheet properly. I had just picked something that looked likely and plugged it in there in my init section.

Now that you point it out, it's pretty easy to do properly and probably get much faster a/d reads to boot.

EDIT: And now that I've read 17.4 I realize my conversions are probably crap too. Had TAD set too short.

 

[blueroomelectronics]

Guess the Junebugs "Tutor" is doing what it's designed to.

 

[futz]

Guess the Junebugs "Tutor" is doing what it's designed to.

You got that right. I'm learning lots.

I'm still a bit unclear about how to properly set up TAD and a/d conversion clock, but I'll get it eventually. Trying lots of things right now. It works, but I'm not sure whether it's accurate yet. Haven't done the calculations yet.

 

[blueroomelectronics]

Thanks Pommie, good to know. Only change for my program was the left justify bit.

;*** VR1 / VR2 debug test DIP 1,2,3,7,8 on
    list    p=18F1320
    include    <p18f1320.inc>
    CONFIG    OSC=INTIO2,WDT=OFF,LVP=OFF
VR1    =    0
VR2    =    1
    org    0
    movlw    72h
    movwf    OSCCON        ; 8 MHz
    movlw    b'00111101'
    movwf    ADCON2
; VR1 (RA1)
Start    movlw    b'00000101'    ; enable A/D, AN1
    movwf    ADCON0        ;
    bsf    ADCON0, GO
    btfsc    ADCON0, GO
    bra    $-2        ; wait till A/D complete    
    movff    ADRESH, VR1
; VR2 (RA3)
    movlw    b'00001101'    ; enable A/D, AN3
    movwf    ADCON0        ;
    bsf    ADCON0, GO
    btfsc    ADCON0, GO
    bra    $-2        ; wait till A/D complete    
    movff    ADRESH, VR2
    goto    Start
    END

 

[mister_e]

There's still the easy and generic way... use FRC as clock source, sampling time between 20-50uSec, this cover most situation.

OR you enter 2 parameter in my PicMultiCalc and you have the results you want depending of your OSC speed and analog source impedance.

**broken link removed**

For those PIC who have internal automatic acquisition time, it also give you the amount of Tad to use.

HTH

 

[blueroomelectronics]

Actually the ADCON2 when available makes it automatic.

 

[futz]

OR you enter 2 parameter in my PicMultiCalc and you have the results you want depending of your OSC speed and analog source impedance.

**broken link removed**

Hey, that's a great utility. Thanks Mister E!

Except it crashes when you try to use some parts of it. Some error trapping would be nice. Anyway, the part I wanted does work.