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INVERTER DELAY LTSPICE

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ANALA

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I have simulated the inverter using LTSPICE...I m using this tool for the first time...I want to
1. measure the inverter delay
2. plot delay vs supply voltage

May i know the procedure to perform these two steps..
 
Post your .asc file.

You can measure delay from the plot, or using a .measure statement.
 
Post your asc file, so that we can see what you are currently doing.
 
As requested i have posted .asc file on which i m working on...its basically a simple inverter...i want to measure the delay and plot it against supply voltage for different values of VDD
 
Attached is your schematic marked up with one way you could change the supply voltage to test the effect on signal delay.
 

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  • DelayTest.asc
    1.1 KB · Views: 306
Mike told you how in post #2.
 
you can do it like this:

inverter_prop_delay.png


1. Run trans simulation
2. view Spice error log
3. rht-click "Measurement: prop_delay"
4. select "plot .step'd meas'd data"
5. rht-click in new graph
6. select "add traces"
7. select "prop_delay"

But to use this method you have to use .measure statement(s).
 

Attachments

  • Inverter_prop_delay.asc
    1.6 KB · Views: 275
Here a more thorough approach. Note that to realistically display the transit delay, you need to make the clock amplitude a function of Vdd. Furthermore, it is more realistic to drive the gates of the inverter under test with a signal that comes from another similar capacitively-loaded stage; not from an ideal voltage source with near-infinite rise/fall times.

I show how to use the cursors built-into the plot pane to display the delay from 50% on the red V(in) on the upper pane to the red V(out) on the lower pane.

DT.png


The ultimate inverter delay measurement method is to build a ring-oscillator out of an odd number of inverters, typically 11 to 31 stages, and then just measure the frequency of oscillation.
 
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