Continue to Site

Welcome to our site!

Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.

  • Welcome to our site! Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.

I'm stuck again building another counter!! (PIC18F46K22)

thewiseishere

New Member
Hey guys i've been tryna building this two button counter but it doesn't work. Displays change at the same time and they showin other things oher than numbers. Anyone has a idea why it is like that?? (Display is common cathode btw)
led3.PNG


Code:
// CONFIG1H
#pragma config FOSC = INTIO67   // Oscillator Selection bits (Internal oscillator block)
#pragma config PLLCFG = OFF     // 4X PLL Enable (Oscillator used directly)
#pragma config PRICLKEN = OFF   // Primary clock enable bit (Primary clock can be disabled by software)
#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF       // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)

// CONFIG2L
#pragma config PWRTEN = OFF     // Power-up Timer Enable bit (Power up timer disabled)
#pragma config BOREN = SBORDIS  // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))
#pragma config BORV = 190       // Brown Out Reset Voltage bits (VBOR set to 1.90 V nominal)

// CONFIG2H
#pragma config WDTEN = OFF      // Watchdog Timer Enable bits (Watch dog timer is always disabled. SWDTEN has no effect.)
#pragma config WDTPS = 32768    // Watchdog Timer Postscale Select bits (1:32768)

// CONFIG3H
#pragma config CCP2MX = PORTC1  // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = ON      // PORTB A/D Enable bit (PORTB<5:0> pins are configured as analog input channels on Reset)
#pragma config CCP3MX = PORTB5  // P3A/CCP3 Mux bit (P3A/CCP3 input/output is multiplexed with RB5)
#pragma config HFOFST = ON      // HFINTOSC Fast Start-up (HFINTOSC output and ready status are not delayed by the oscillator stable status)
#pragma config T3CMX = PORTC0   // Timer3 Clock input mux bit (T3CKI is on RC0)
#pragma config P2BMX = PORTD2   // ECCP2 B output mux bit (P2B is on RD2)
#pragma config MCLRE = INTMCLR  // MCLR Pin Enable bit (RE3 input pin enabled; MCLR disabled)

// CONFIG4L
#pragma config STVREN = ON      // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = ON         // Single-Supply ICSP Enable bit (Single-Supply ICSP enabled if MCLRE is also 1)
#pragma config XINST = OFF      // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))

// CONFIG5L
#pragma config CP0 = OFF        // Code Protection Block 0 (Block 0 (000800-003FFFh) not code-protected)
#pragma config CP1 = OFF        // Code Protection Block 1 (Block 1 (004000-007FFFh) not code-protected)
#pragma config CP2 = OFF        // Code Protection Block 2 (Block 2 (008000-00BFFFh) not code-protected)
#pragma config CP3 = OFF        // Code Protection Block 3 (Block 3 (00C000-00FFFFh) not code-protected)

// CONFIG5H
#pragma config CPB = OFF        // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
#pragma config CPD = OFF        // Data EEPROM Code Protection bit (Data EEPROM not code-protected)

// CONFIG6L
#pragma config WRT0 = OFF       // Write Protection Block 0 (Block 0 (000800-003FFFh) not write-protected)
#pragma config WRT1 = OFF       // Write Protection Block 1 (Block 1 (004000-007FFFh) not write-protected)
#pragma config WRT2 = OFF       // Write Protection Block 2 (Block 2 (008000-00BFFFh) not write-protected)
#pragma config WRT3 = OFF       // Write Protection Block 3 (Block 3 (00C000-00FFFFh) not write-protected)

// CONFIG6H
#pragma config WRTC = OFF       // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF       // Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)
#pragma config WRTD = OFF       // Data EEPROM Write Protection bit (Data EEPROM not write-protected)

// CONFIG7L
#pragma config EBTR0 = OFF      // Table Read Protection Block 0 (Block 0 (000800-003FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF      // Table Read Protection Block 1 (Block 1 (004000-007FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF      // Table Read Protection Block 2 (Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF      // Table Read Protection Block 3 (Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks)

// CONFIG7H
#pragma config EBTRB = OFF      // Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks)

// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.


#include <xc.h>


#define _XTAL_FREQ 8000000

#define buttonplus PORTCbits.RC0
#define buttonminus PORTCbits.RC1
#define display1 LATAbits.LATA4
#define display2 LATAbits.LATA5

char ones = 0, tens = 0, number = 0;
const char digit[10] = {0x3F, 0x06, 0x5B, 0x4F, 0x66, 0x6D, 0x7C, 0x07, 0x7F, 0x6F};

void main(void) {
    TRISC = 0x03;
    TRISA = 0x00;
    ADCON1 = 0x0F; // All pins are configured as digital

    // Set RC1 and RC2 as inputs
    TRISCbits.TRISC0 = 1; // Set RC1 as input
    TRISCbits.TRISC1 = 1; // Set RC2 as input
    ANSELC = 0;
   
   
    while(1)
    {
        display2 = 1;
        display1 = 0;
        LATA = digit[ones];
        __delay_ms(5);
       
        display2 = 0;
        display1 = 1;
        LATA = digit[tens];
        __delay_ms(5);
       
        if (buttonplus == 1)
        {
            number++;
            ones = number%10;
            tens = number/10;
            while (buttonplus == 1)
            {
                display2 = 1;
                display1 = 0;
                LATA = digit[ones];
                __delay_ms(5);
               
                display2 = 0;
                display1 = 1;
                LATA = digit[tens];
                __delay_ms(5);
            }
        }
        if (buttonminus == 1 && number !=0 )
        {
            number--;
            ones = number%10;
            tens = number/10;
            while (buttonminus == 1)
            {
                display2 = 1;
                display1 = 0;
                LATA = digit[ones];
                __delay_ms(5);
               
                display2 = 0;
                display1 = 1;
                LATA = digit[tens];
                __delay_ms(5);
            }
        }
        if (number > 99)
        {
            number = 0;
        }
    }
}
 
You are now using a seven segment decoder IC, but appear to be feeding that with the segment table pattern rather than the straight binary digit value?

And you are writing the table pattern to port A, so changing all the outputs from it.
 
I think you have the wrong display.. I think you need a common cathode, OR drive the pins with a PNP

Using that display the pins 1 and 2 are both low... If you had a common cathode then it would work.

@dandak... 6th line after Xtal_Freq...

When you changed the "other" one you put pullups on the 7 segment display, so it saw a 5v and a 0v

**** Update.. to get it working as is.. put your 10 pullups back in above the transistors.
 
Last edited:
ALSO!! I been going through your code.

You are now using a segment encoder so the table is out... THEN you are using LATA and overwriting the display 1&2 latches...

Needs sorting
 

Latest threads

New Articles From Microcontroller Tips

Back
Top