i'm not sure, 7 segment decoder should be different...(so that the successive odd number count should be displaying the previous even number - All possible if the logic inside decoder is changed)... it can be done by this way.
But the actual way used might be different...
Sounds like homework. One approach: build a state machine with five states (takes only three flip flops). Allocate the states so that they create the bit patterns for 0 to 4, but wire the outputs left shifted by one bit, creating the correct BCD patterns for 0,2,4,6, and 8
You'll need to be more specific: count the output from another circuit or generate the numbers? And what format BCD, Hex, binary.
If simply digital, then just trigger on the least significant digit, if that's a 0 then you have an even number...
Sounds like homework. One approach: build a state machine with five states (takes only three flip flops). Allocate the states so that they create the bit patterns for 0 to 4, but wire the outputs left shifted by one bit, creating the correct BCD patterns for 0,2,4,6, and 8
You'll need to be more specific: count the output from another circuit or generate the numbers? And what format BCD, Hex, binary.
If simply digital, then just trigger on the least significant digit, if that's a 0 then you have an even number...
Connect the A output to the 7 segment decoder's B input, the B output to the C input etc. and leave the D output and A input unused (connect the input to 0V and leave the output unconnected).
You'll need an and gate to reset the counter when the A and C outputs are high, you can use a diode AND or a real gate. I'd only bother with the gate if I was using a quad NAND IC to make an oscillator.
Ur right, you'll have to add another bit [just another JK_flipflop] and figure out how to reset all after the cycle when the most significant bit goes high.
Should be quite a number of examples out there on the internet I'd think.
[I'm not an expert here]