How does a transistor amplify current or voltage?

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Jony130,


Congratulations Jony130! Jackpot! You have finally showed me definitive proof that the transistor will come out of saturation with the curves of fig. 16 of the ON data sheet. Brownout's circuit shows a Ib of about 0.5 ma and a Ic of about 115 ma. That is more than enough to increase the voltage by 0.69 volts and beyond, thereby establishing reverse c-b bias to bring the transistor out of saturation. It is amazing to see how the ON data sheet differs from the Fairchild one. The Fairchild does not even show Ib's, and does not show Vce rising much above 0.3 volts. That is not enough to bring it out of saturation.

By the way, the ping thumb filies you posted are useless to me because they are just that, thumbnail size. Unless you can tell me how to expand them, don't bother to post them.


I sure would like to read that material, but the thumbnail size precludes me from doing so.


As I said before, I don't trust that curve to analyze saturation. The Ib is relatively constant at 0.5 ma, and yet it shows a collector current of 70 ma at that value on the saturation boundary. The simulation shows a Ic of 117 ma. I don't think that hfe has any significance in saturation, because Ic cannot be controlled by Ib when in that state.


I have never said Vbe controls anything in the saturation region. I have always said that the Vbe causal control was for the active region.

Ratch
 
Brownout,

The simulations are correct.

I agree. That was never in doubt. The analysis was.

The Ic-Vce curves correctly predict the region between saturation and active regions. Jony130's analysis is correct. The chart you keep using as an excuse to not consider all the factual information presented is not useful for analyzing this circuit.

No, I don't think they do. They are indefinite in the saturation region.


Not true. Only when Jony130 showed the ON semiconductor charts for the Vce(sat), was there correct proof that the transistor came out of saturation at the Ib and Ic in the simulation. The Fairchild data gave bogus information that did not even include Ib values. When that was descrepancy was resolved, only then was was the proof complete.

Ratch
 
No, I don't think they do. They are indefinite in the saturation region.

The Ic-Vce curves correctly predict the region between saturation and active regions. Jony130's analysis is correct. The are not indefinite. They are accurate.


We've been showing proof for days. Every equation, every chart and every simulation has shown the same thing. The "correct" chart is consistant with everyting else we've posted.
 
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By the way, the ping thumb filies you posted are useless to me because they are just that, thumbnail size. Unless you can tell me how to expand them, don't bother to post them.
The only think you need to do is to click on the photo.


I don't think that hfe has any significance in saturation, because Ic cannot be controlled by Ib when in that state.
But, Hfe and Ib determine the max Ic current in our circuit
 

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Hi again,


You mean 'now' you are saying that Vbe doesnt control anything in sat
Im glad you said that, because now we dont have to worry about being in saturation, which i said you shouldnt be so hung up on anyway a few posts back. This is because once we first come out of saturation we enter (of course) the active region, and Ic still controls the show ie Vce. There's still no Vbe control there, it's still all Ic, and the proof is in the charts that Jony showed.
Next you can say that you never said Vbe controls the transistor when it first comes out of saturation, but that wont help either because Ic can control the transistor within the entire active region. Sorry

Anyway, if you look a few posts back you'll see two figures in one drawing i posted that shows the evolution of the collector emitter voltage with collector current. It's basically Jony's plot only i have mapped out the route we would follow with 600ua base current and increasing Ic. The purple arrow shows Ic increase, while the blue arrowheads are to be followed. In other words, if we were increasing Ic then we would walk along the line shown with the blue arrowheads in the directions of those arrowheads. We then read off the Vce at the corresponding point.

This is moot now, but saturation can be defined programmatically as the point where the base emitter diode is forward biased AND the base collector (Vbc) voltage is greater than a set level for that transistor part such as 0.15v. Thus as example:
Saturation=Vbe>0.4 AND Vbc>0.15
roughly for some transistor part. Note Vbc is the base collector voltage not the collector base voltage.
 
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Ratchit
I have always said that the Vbe causal control was for the active region.
I will not dispute about this, becaues personally as a hobbyist I think that some times we need analysis BJT circuits as a Vbe "control" device and another time (more often) we use current "control" model for BJT.
But you have to remember that VC/CC are just a models.
**broken link removed**

But what is the real physical "cause" in BJT? I don't know.
My book about semiconductor theory don't gives definitive answer.
We end up with large number of equations that don't have general solution and with some models which try to describe our "reality" as close as they can.
And we still waiting for the great unified theory.
 
Hi Jony,


The way i like to look at it is like this. "Control is in the hands of the beholder"

Given a simpler circuit, a single resistor as in a small heater, if we energize it with a current generator we often say it is current controlled, but if we energize it with a voltage generator we say it is voltage controlled. Of course we also have voltage controlled voltage sources, voltage controlled current sources, current controlled voltage sources, and current controlled current sources.
Personally i think of the resistor as being energized first with a voltage and then with current, but these terms are too general to be specific enough to declare which is really the most physically perfect. We have to have accumulated charge to get voltage, yet we have to have voltage to start the charge flow. That's why i introduced the concept of looking at it from the perspective of the Big Bang. If we declare where our starting point is in space time, we can say which is the controlling parameter. If we say that we got there after the charges accumulated then we can say that voltage is controlling, but if we have to first accumulate charge (we got there even sooner) then we have to say charge control. i guess we can look at other things too, like how we got the charges to accumulate. Did we physically move the charges using physical force? Then we might say the system is force controlled.
 
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Brownout,

The Ic-Vce curves correctly predict the region between saturation and active regions. Jony130's analysis is correct. The are not indefinite. They are accurate.

Can you construct the curves shown in fig. 16 of the ON data sheet from the Ic vs Vce? Show us how if you can.

We've been showing proof for days. Every equation, every chart and every simulation has shown the same thing. The "correct" chart is consistant with everyting else we've posted.

You have been posting what you think is proof. Only Jony130 finally did it right.

Ratch
 
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Jony130,


Naturally I followed instructions, and clicked on it many times with no luck.

But, Hfe and Ib determine the max Ic current in our circuit

I don't quite know the context of that statement. Are you talking about the saturated or active region. The three base resistor values allow different Ic's in the active region. There was never any question about that, was there?

I sure am glad you told me that text is in Polish. I would have never known otherwise. So it shows two points in the active region and one point is the cutoff region. Is that supposed to show something significant about the saturation region?

Ratch
 
Can you construct the curves shown in fig. 16 of the ON data sheet from the Ic vs Vce? Show us how if you can.

It's not necessary or relevant.

You have been posting what you think is proof. Only Jony130 finally did it right.

I've been posting what I know is proof. We had it right from the start.
 
MrAl,

You mean 'now' you are saying that Vbe doesnt control anything in sat

Not like it did in the active region when it had a exponential relationship with Ic. But of course, if you reverse bias the b-e junction, the transistor will cut off.

Im glad you said that, because now we dont have to worry about being in saturation, which i said you shouldnt be so hung up on anyway a few posts back.

I never did worry about saturation, I wondered how the transistor came out of saturation. Fortunately Jony130 provided the answer to that.


I sure don't follow your logic here. Vbe always has an expontial relationship with Ic in the active region. No one tries to control Vce with Ic or even Ib with Ic. And of course, Vbe's control is causal and Ib's control if functional.


You are referring to the Ib vs Vce curves? No, unless you can produce from your curve the curves of fig. 16 of the ON data sheet which Jony130 posted, I don't consider the analysis valid.



Or one can say, saturation occurs when both junctions are forward biased.

Ratch
 
Jony130,


VC/CC are viewpoints which can be incorporated into models. The CC model works fine for the functional aspect of a BJT, and the CC for the inner workings of the BJT. The Vbe is temperature sensitive, but the way, so you have to know that internally, Vbe does affect Ic.


Diffusion, therman generation, junction voltages and more. If you know the parameters, the equations give the answers. BJT's are a mature technology, and there is not too much that is unknown about them.

And we still waiting for the great unified theory.

Not for BJT's. That is straight forward application engineering and knowledge.

Ratch
 
Brownout,

It's not necessary or relevant.

Sure it is. Knowing that the transistor will come out of saturation at that current and Ib is very relevant. Just thinking it will or guessing it will is not the same as proof. Thanks to Jony139, we now know it will.

I've been posting what I know is proof. We had it right from the start.

You mean you think it would happen. You presented simulations and postulations, but no valid explanations on why it happened. That is not proof like Jony130 gave.

Ratch
 
Sure it is. Knowing that the transistor will come out of saturation at that current and Ib is very relevant. Just thinking it will or guessing it will is not the same as proof. Thanks to Jony139, we now know it will.

We already know that from the charts that have been given, as well as the equations.

You mean you think it would happen.

I mean I know it would happen.

You presented simulations and postulations, but no valid explanations on why it happened. That is not proof like Jony130 gave.

We presented simulaitons and proof. We've shown you the correct charts, we've shown the math. You're reasons for rejecting the data are not valid in any way, shape or form. Everything we've shown corresponds and calibrates exactly as it should, and every chart, simulation and equation we've shown is entirely consistent with every other. We've proven the correct operation forwards and backwards. The analysis is bullet proof, and you cannot make any rational argument otherwise. Non-substantial, contradictory statements are meaningless.

The CC model works fine for the functional aspect of a BJT, and the CC for the inner workings of the BJT.

This is correct, and the same as how Sedra and Smith defines it.
 
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From above:
"No one tries to control Vce with Ic or even Ib with Ic"
We never said we wanted to control Ib with Ic, but we do want to control Vce with Ic here, like it or not. I'd like to do that with other circuits too, if you dont mind.

From above:
"I sure don't follow your logic here"

That is absolutely correct, you dont follow the logic here. Alas, we agree on something
I suggest you try to next.

Oh yeah, try replacing the NPN transistor in that osc circuit with a N channel MOSFET. The circuit does not work. That's because the MOSFET does not have the same reverse characteristic that the bipolar NPN has and will not start to turn off at some reasonable level. The MOSFET is more voltage controlled.
 
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Brownout,

We already know that from the charts that have been given, as well as the equations.

The chart presented by Jony130.

I mean I know it would happen.

But you never proved it. Jony130 did.


Simulations and conjectures which you said was proof.

This is correct, and the same as how Sedra and Smith defines it.

And what I have been saying for a long time now. At least we agree on that.

Ratch
 
MrAl,

From above:
"No one tries to control Vce with Ic or even Ib with Ic"
We never said we wanted to control Ib with Ic, but we do want to control Vce with Ic here, like it or not. I'd like to do that with other circuits too, if you dont mind.

Sorry for the confusion. I was thinking of the active region. In the saturation region, for this circuit, the Vce is determined sufficiently by Ic, as Jony130 showed.

From above:
"I sure don't follow your logic here"

That is absolutely correct, you dont follow the logic here. Alas, we agree on something
I suggest you try to next.

I alway try to do so.


It has different output characteristics.

Ratch
 
The chart presented by Jony130.

And the ones before.

But you never proved it. Jony130 did.

I never said I proved it. You should read more carefully.

Simulations and conjectures which you said was proof.

Facts and truths, proof positive. Correct charts, correct math, correct simulations. All in excellent agreement, all consistent, all bulletproof. You've done nothing to show otherwise.


Glad you see the light.
 
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Hello again,


My friend, if i may call you that, as i can put this as gently as possible...you dont seem to understand transistor action in its entirety, only partly as you have demonstrated repeatedly.
I had hoped to help you to understand a bit more, but you insist on ignoring the facts and presentations by myself and others. You can not seem to get the idea out of your head that the transistor only works the way you see it to work in spite of three knowledgeable people providing you with an abundance of information to the contrary.
At the very least, you should acknowledge that ANY three terminal element has N modes of operation, where you can control the element in a number of ways (i think it is 6 in total, lets see, be, bc, ce, and their reverses and that's only for voltage). In other words, treat the transistor as a black box with three terminals and FORGET anything else you were told in the past.

You have to realize also that *we* understand every point *you* have presented so far, but you have yet to understand one simple and straightforward point: that the transistor can be controlled, at least to some degree, by varying it's collector current and NOTHING else. It doesnt matter if its in saturation for not, for the third time i say this now! Forget about it. Assume sat if you wish, assume active if that suites you better, take your pic, the collector current still controls!

That's it. Either you understand somehow, someday, that the transistor can be controlled from its collector current or you never do. Do us a favor and take a pick or flip a coin.
I've seen this happen many times before with other electrical issues, and it takes a bit of time to sit back and think about it and that's when it becomes more clear.

So are you willing to try to understand how the transistor can be controlled from its collector current, or are you going to argue against this indefinitely, despite all facts to the contrary?
 
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