Help for circuit.

[arm755]

Pending the outcome of the measurements I asked you to make in post #17, here is circuit that probably does what you asked for. Without having your current measurement, the one caveat is can the LM393 sink enough current to pull V(bsi) low? If after you make your measurement the answer is no, then there is a simple mod that will boost the current sinking ability of the circuit.

I am using a window comparitor circuit to drive the bsi output pin. The alarm signal is differentiated, and the two comparitors detect if either the alarm signal just turned on, or just turned off.

There is a start-up inhibit part to this circuit, to prevent a spurious output during application of power.

The two LM393 comparitors are available as in a 8pin dip package. The Accy line is just a fused version of the car's power. The dashed box on the right is my guess of what is inside the ECU. You will confirm my assumption if you make the measurements I asked for.

View attachment 101189

BTW thank You very much for the diagram. It Looks good and I will try it out. One question what simulation software are You using?

 

[Les Jones]

Mike's design is better than mine. It will be more resistant to false triggering than my suggested circuit. You would probably need to add a single transistor to drive a relay from the comparitor outputs.

Les.

 

[arm755]

Hi can anybody check if this circuit might work. My simulator is not good enough. Best Regards.

 

[Les Jones]

Point 1 With R1 and r2 equal in value the lower input of the XOR gate can never get above half the supply voltage. This could be interpreted as either a 1 or a 0.
Point 2 The time constant of 100 uf and 4.7 K would give a shorter pulse than you asked for. 4700 x 100/1000000 = 0.47 seconds

This looks like it is based on the idea that I said might work in post #8 If you remove R2, Change R1 to 22K and remove D1 (Shorting the wires together that went to it's anode and cathode.) I think it should work but the switching transistion may be a bit slow. (A schmitt input XOR gate would solve this problem but I do not think such a device exists. You could add two schmitt inverters to form a non inverting schmitt gate between C2 + and the lower input of the XOR gate to achieve the same result.) I would also suggest taking the positive supply for the gate from the positive of D3. I would also change D3 to a 12 volt zener as 16 volts Is getting close to the maximum rating of the supply voltage to the gate. I would also add a resistor between the gate output and the transistor to limit the output current to about 5 mA (Say 2.2K)

Les.

 

[arm755]

Point 1 With R1 and r2 equal in value the lower input of the XOR gate can never get above half the supply voltage. This could be interpreted as either a 1 or a 0.
Point 2 The time constant of 100 uf and 4.7 K would give a shorter pulse than you asked for. 4700 x 100/1000000 = 0.47 seconds

This looks like it is based on the idea that I said might work in post #8 If you remove R2, Change R1 to 22K and remove D1 (Shorting the wires together that went to it's anode and cathode.) I think it should work but the switching transistion may be a bit slow. (A schmitt input XOR gate would solve this problem but I do not think such a device exists. You could add two schmitt inverters to form a non inverting schmitt gate between C2 + and the lower input of the XOR gate to achieve the same result.) I would also suggest taking the positive supply for the gate from the positive of D3. I would also change D3 to a 12 volt zener as 16 volts Is getting close to the maximum rating of the supply voltage to the gate. I would also add a resistor between the gate output and the transistor to limit the output current to about 5 mA (Say 2.2K)

Les.

Thanks for your observation. On my simulation program it worked well. Can you try it out on yours?

 

[Les Jones]

I have never used a simulation program. I just design things and build them with real componenets. You say "On my simulation program it worked well." but you do not say WHAT worked well. I assume it was either your circuit in post #23 or that circuit with my suggested changes. When I get time and if I have a 4070 in stock I will try building the delay circuit using the XOR gate. It will; be quicker than finding a free simulation program and learning to use it.

Les.

 

[alec_t]

Remove D5. Its presence prevents the catching diode D4 from doing its thing.

 

[AnalogKid]

Some circuits don't like attenuated inductive kicks traveling around on the power rail, and there will be a significant one because the 1N400x series of diodes is not particularly fast responding. An alternative clamp technique is a 24 V zener across Q2. This returns the spike current to GND.

ak

 

[arm755]

Is there any other sugestion? Can somebody try it out on any simulation or designing programa like LTSpice? I will be greatfull. I am using Circuit Wizard but it is not acurate enough.

 

[alec_t]

Here's the LTspice sim :-

 

[AnalogKid]

Don't remember what the datasheet says, don't care. A 2N2222 with 24 mA base current won't last long.

ak

 

[arm755]

Here's the LTspice sim :-
View attachment 101228

I downloaded LTSpice IV but it says: Could not open library file "cd4000_v.lib" can you help me out with that?

 

[alec_t]

That library file is downloadable for free from the Yahoo LTspice User Group. When a model from the file is used, a net label Vdd must be present on the schematic.
I agree with ak that the transistor needs a base resistor to limit current. Relying on the internal resistance of the XOR gate is not good practice.
As Les pointed out, R1=R2 won't work.
Here's my circuit offering :-

Depending on your relay characteristics, it might be advisable to replace the CD4070 with a 74HC86 and reduce Vdd accordingly.

 

[arm755]

That library file is downloadable for free from the Yahoo LTspice User Group. When a model from the file is used, a net label Vdd must be present on the schematic.
I agree with ak that the transistor needs a base resistor to limit current. Relying on the internal resistance of the XOR gate is not good practice.
As Les pointed out, R1=R2 won't work.
Here's my circuit offering :-
View attachment 101230
Depending on your relay characteristics, it might be advisable to replace the CD4070 with a 74HC86 and reduce Vdd accordingly.

I don't know you all but with all the respect and according to all technologies out there; the Ltspice program is a bit frustrating and not giving any help in simulating or detekting any errors. I thought Circuit Wizard was a big S...it but this program is so not intuitive and dificult to use. I seems a program from the 80's like for Windows 3.1.

 

[alec_t]

the Ltspice program is a bit frustrating and not giving any help in simulating or detekting any errors.

Granted, the program has a steep learning curve, but the effort is well worthwhile. It will detect errors. You can view the error log to see them. The program has a comprehensive, albeit terse, Help function accessible with the F1 key. There are also educational .asc files included with the standard download. The Yahoo group can also offer assistance.

 

[arm755]

Granted, the program has a steep learning curve, but the effort is well worthwhile. It will detect errors. You can view the error log to see them. The program has a comprehensive, albeit terse, Help function accessible with the F1 key. There are also educational .asc files included with the standard download. The Yahoo group can also offer assistance.

Someone ever used Circuit Wizard? Any comments on this program regarding the relaibility?