Ok, thanks to ChrisP58 in another thread, he suggested the possibility of changing a circuit design with a single Primary GDT and offered the Center Tap GDT. He gave me a simple explanation which is understandable, for a guy like me.
ChrisP58,The two NPN transistors are internal to the PWM chip.
When Q1 turns on it will pull A low, B will swing up to +24V, The upper mosfet will see a negative 12V pulse, and the lower mosfet will see a positive 12V pulse. When Q2 turns on, everything swaps state.
I'm confused about the 12v supply in the image below the first schematic, because SG3525 already has a supply provided through the internals of the Chip?
not sure if this will work in this schematic. Bear in mind I know the diodes would have to be removed, I have thought some descrete Transistors might work and might be needed since SG3525 drivers shouldn't exceed 500ma. I'm just not sure if they would lag or mess the timing up if they could be used. If someone can understand and help me with my quandary's it would greatly appreciated.
Not from my reading of the datasheet. You supply Vcc (for the chip internals) and Vc (for the output stage transistors) from external sources (which may be one and the same).
Edit: Since the IC has a full H-bridge output, why do you want to use a centre-tapped primary?
Not from my reading of the datasheet. You supply Vcc (for the chip internals) and Vc (for the output stage transistors) from external sources (which may be one and the same).
Edit: Since the IC has a full H-bridge output, why do you want to use a centre-tapped primary?
I'm not sure, I just wanted to see how it would operate, I have already wound the Transformer 1.1.1.1 14 turns 18g Mag. I'm just throwing out possibilities, I thought it might enhance the operation? Then again it might create problems that's why I wanted to discuss it, before I build a Spice Model.
Just try the circuit in spice. The sim should show up any problems, which can then be discussed .
Edit: Btw, do you really need to sim the whole SG3525 IC? Two spice pulse voltage sources are all you need to sim the IC output. The pulse rate is ~40kHz by my reckoning from figures in the datasheet and with the R,C values shown at pins 6,7 in the circuit.
Not from my reading of the datasheet. You supply Vcc (for the chip internals) and Vc (for the output stage transistors) from external sources (which may be one and the same).
Edit: Since the IC has a full H-bridge output, why do you want to use a centre-tapped primary?
If you look at the SG35xx family of ICs again, the outputs are totem pole transistors. And they have a "dead time" between the pulses. The IC was originally for a switching convertor, I've used them for PWM motor speed controls, by diode or-ing the outputs.
KV, still don't know why you don't drop the GDT and just use mosfet drivers? Not all schematics from the web are "proven" to work. Some are just concepts.
If I remember right, either Magnet18 or Derstrom (it was one of the guys with Tesla as an avitar) over at AAC made a working/proven speaker like you are wanting.
Not from my reading of the datasheet. You supply Vcc (for the chip internals) and Vc (for the output stage transistors) from external sources (which may be one and the same).
Edit: Since the IC has a full H-bridge output, why do you want to use a centre-tapped primary?
Now that I'm home again, I'm re-reading this post. So, the 12v supply to the center tap does what exactly? Why isn't the center tap fed to Ground? How can it exist in the circuit? other than the possibility the emitters of either A or B block voltage, thus keeping them from affecting one another, and if it went to ground it would be a short.
Now, if what I just said is true then it's the same as a single winding with each pulse through the winding, the voltage is blocked by the emitters of either like a diode, and the pulse diminishes in the winding or stored or what ever.
Now that I think I have that, the 12v is also blocked by each emitter, and somehow the 12v is balancing or something, like back emf? or dissipating each pulse, allowing the windings to operate in circuit as if it were one winding.
KV, still don't know why you don't drop the GDT and just use mosfet drivers? Not all schematics from the web are "proven" to work. Some are just concepts.
If I remember right, either Magnet18 or Derstrom (it was one of the guys with Tesla as an avitar) over at AAC made a working/proven speaker like you are wanting.
Thanks man, I'm glad you got my back. I just have about 20 or so of these SG3525 and caps I want to build this and prove it or disprove it, I don't want all my time for not, just saying I'm one stubborn cuss.
I don't give in easily. Some think it's easier and I will move on as soon as I get this out of my head, but I can't move on till I'm satisfied that I've done the circuit a proper service and to the Author, if you get my drift, so that he gets his just deserves, which ever way it goes.
Just try the circuit in spice. The sim should show up any problems, which can then be discussed .
Edit: Btw, do you really need to sim the whole SG3525 IC? Two spice pulse voltage sources are all you need to sim the IC output. The pulse rate is ~40kHz by my reckoning from figures in the datasheet and with the R,C values shown at pins 6,7 in the circuit.
A centre-tapped primary on the GDT would only make sense (to me) if the outputs A,B of the SG3525 were open-collector. But they're not: they're push-pull, able to sink and source current.
If it's any help, here's the asc file for my sim of the output stage of the SG3525 driving a (non-centre-tapped) GDT which in turn drives the output stage of your Plasma Speaker circuit. The secondary inductance of the L4/L5 transformer is pure guesswork.
I guess when I look at this circuit, I'm thinking somehow I could center tap to ground through a capacitor as seen here, then tie it to 12v rail.
ChrisP58, also mentioned the reasoning for the center tap here in post #8 of another thread we were discussing on the nature of the circuit and the need of the GDT.
ChrisP58,The gate drive transformer is necessary because the source pin of the upper mosfet is not at ground.
But I think there is a problem with the transformer driver. Pins 11 and 14 of the SG35245 are both emitters. You are putting +12V alternately into each side of the transformer, but there is no ground node to complete the current path.
The easiest way to fix thast would be to add a center tap to the GDT primary.
As I said above this circuit seems to have a possible way to ground the top Mosfet, of course that's only if I screwed up in an earlier version of the schematic? Here is the schematic that gave me some ideas.
Pins 11 and 14 of the SG35245 are both emitters. You are putting +12V alternately into each side of the transformer, but there is no ground node to complete the current path.
I believe Chris was under the impression that the pins were open-collector. There is a ground node (via whichever one of the bottom FETs is conducting), and 12V is provided via whichever one of the top FETs is conducting. When A is high, B is low (and vice versa).
I believe Chris was under the impression that the pins were open-collector. There is a ground node (via whichever one of the bottom FETs is conducting), and 12V is provided via whichever one of the top FETs is conducting. When A is high, B is low (and vice versa).
Maybe it's just the SG3525 not built the way it should be, or something else. The waveforms don't look the same this one
I've tried to setup the simulation the same with no luck. alec_t did a simulation with just an output sine which when I ran it, looked very similar to this one.
I think I should just build it now. I guess I've learned a simulation is just that, a simulation.
Actually my sim used a square wave to represent the output from the SG3525.
Edit: Btw, if you have a cap in series with the GDT primary, as shown in the original circuit (why is it there??), you will get strange waveforms. My sim excluded the cap.
Actually my sim used a square wave to represent the output from the SG3525.
Edit: Btw, if you have a cap in series with the GDT primary, as shown in the original circuit (why is it there??), you will get strange waveforms. My sim excluded the cap.
BTW, I posted a comment on adams site to maybe get some help as to how he setup his simulation, I would like to produce a the same output V(hvout) V(gm1) V(gm2) as in his screenshot you found.