Billy Mayo
Member
Servo Ground To Chassis Ground was 17.6 Millivolts SORRY guys
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You are the first person I heard about who uses a DVM to measure logic levels on Cmos Logic ICs. When I troubleshooted Cmos logic I didn't even think about using a DVM that picks up mains hum, local radio stations and many communications..
is this a common problem?
I posted the input impedance of the Fluke 87 DVM as TEN MILLION ohms which is not a low impedance, it is a very high impedance.I guess the DVM probes are low impedance and not shielded
You are measuring logic levels with the wrong instrument. It should be called, "How to waste time by using as DVM to measure logic levels".What should it be called?
You were measuring the voltage drop across ground busses.What is this called? what kind of test or check am I doing
You are the first person I heard about who uses a DVM to measure logic levels on Cmos Logic ICs. When I troubleshooted Cmos logic I didn't even think about using a DVM that picks up mains hum, local radio stations and many communications.
The probe and its wire are unshielded so they act like an antenna, especially when they feed the very high impedance of the DVM.
You were measuring the voltage drop across ground busses.
No and NoDoesn't the very high impedance BLOCK the unshielded noises, hum , etc.
You're saying the DVM meter will amplifier this right?
So you guys never use a DVM meter to measure logic level for TTL or CMOS?
Or do you have to get DVM meter probes that are shielded?
If you ever learn about electronics then you might learn about the differences between TTL and Cmos logic ICs.Is this the same for measuring logic levels for TTL?
No. The opposite.Doesn't the very high impedance BLOCK the unshielded noises, hum , etc.
No, a DVM set to show volts is not an amplifier. It simply shows how many volts of interference its unshielded probe and wire pickup. It injects the interference into the circuit it is "testing".You're saying the DVM meter will amplifier this right?
Instead of asking millions of questions about very simple electronics basics, you should learn things like the logic voltage levels of TTL and Cmos:Is this a potential difference? and can this make a difference when probing around on logic levels by not having the correct reference to ground ?
I think you should use the 'scope for measuring logic levels, not the DVM
Click to expand....
is this a common problem?
10 Meg Ohm per Volt is NOT "Low Impedance"I guess the DVM probes are low impedance and not shielded
Possibly somewhat "Loading it down". Definately NOT Shorting it.What should it be called?This thread about a DVM (set for measuring volts) shorting out a circuit DOES NOT MAKE ANY SENSE. Click to expand...
Signal Ground to DC ground was 10 millivolts
Signal Ground to Servo ground was 16.2 millivolts
Signal Ground to Chassis Ground was 1.4 Millivolts
DC ground to Servo Ground was 6 Millivolts
DC ground to Chassis Ground was 11.2 millivolts
Servo Ground To Chassis Ground was 17.6 volts
Click to expand...
What is this called? what kind of test or check am I doing
Possibly somewhat "Loading it down". Definately NOT Shorting it.
Also the LEAD CAPACITANCE will create a tiny, Momentary current draw, When making Connection.
a DVM set to show volts is not an amplifier. It simply shows how many volts of interference its unshielded probe and wire pickup. It injects the interference into the circuit it is "testing".
No. The opposite.
A high impedance picks up interference from the air. A low impedance shorts interference to ground.
A shield blocks interference.
I don't understand the difference between a logic probe VS a Fluke DVM 87
What is the differences when measuring logic levels?
Signal Ground to DC ground was 10 millivolts
Signal Ground to Servo ground was 16.2 millivolts
Signal Ground to Chassis Ground was 1.4 Millivolts
DC ground to Servo Ground was 6 Millivolts
DC ground to Chassis Ground was 11.2 millivolts
Servo Ground To Chassis Ground was 17.6 millivolts
What is this called? what kind of test or check am I doingA Bunch of Mindless Tests.
What is the POINT TO MAKING THESE TESTS?
Is there any Schematic Info telling you What readings you should get?
Instead of asking millions of questions about very simple electronics basics, you should learn things like the logic voltage levels of TTL and Cmos:
1) What is the maximum voltage for a TTL logic low (with a 5V supply)? What is the maximum TTL input current for a logic low?
2) What is the maximum voltage for a Cmos logic low (with a 5V supply)? What is the maximum Cmos input current?
The only schematic you showed us has two 148 opamps feeding the inputs of a 4001 NOR gate through 100k series resistors. All of them are powered from +13V.How is a 10 Meg ohm DVM meter loading it down? or pulling it down?
Are you saying it's a voltage divider?
The probe has such a small amount of capacitance then I don't think it will cause logic to change states but interference picked up can.So the Probe lead has capacitance making connection with the PCB board trace or node capacitance , creates a current draw?
An oscilloscope probe and a logic probe are both shielded and are suitable for testing logic inputs. A DVM is not.So what Meter probes can I get that are shielded?
Why don't you understand that the ordinary wire and probe connected to the input of the DVM are an antenna? They pickup mains hum and interference from the air because they are not shielded and because they feed the high input impedance of the meter then the interference does not have a low impedance voltage divider to ground. Connect your 'scope probe to the red wire of your DVM to SEE the hum and interference.An Oscilloscope probe is 10 megs, I just measured it today and now you're saying that High Impedance is picking up interference , etc.
So how is an O-scope good to measure logic levels when it's high impedance?
An Analog Meter is low impedance, is this better to use when measuring logic state or what is a problem with using an analog meter when testing logic levels?
The impedance of a logic probe must be fairly high for it to measure your Cmos circuits. It is shielded so it does not pickup mains hum and interference.So a Logic Probe, so low impedance ? and has shielding?
The voltages are only a maximum of 0.018V above ground so of course they are tied together.Why is there potential differences? and where does the potential differences come from?
When I measured ohms between each ground , it was in the milliohms , so they are tied together and not isolated? what would I measure in ohms to know if the grounds are isolated?
100k resistor being loaded to ground by the 10M ohm probe causes the +12.5V to drop to +12.4V.
But the Cmos logic low is about +3.9V or less so THERE IS NO WAY that the resistance of the probe causes the logic high to be low enough for the Gate to change states but interference picked up can.
.The impedance of a logic probe must be fairly high for it to measure your Cmos circuits
Will only o.018V at the input of TTL or Cmos logic cause it to be a logic high? No, because you discovered that the input of a gate must be at least a few volts to be a logic high then millivolts do not affect the logic.
Grouned by the 10meg ohm probe? I thought the DVM fluke 87 was floating from ground, so there is an internal ground inside the fluke meter? or how does it get grounded?
Ohms lawGrouned by the 10meg ohm probe? I thought the DVM fluke 87 was floating from ground, so there is an internal ground inside the fluke meter? or how does it get grounded?
So the interference picked up has a high voltage? or resistance? which loads and creates a voltage divider when I put the DVM probe on the node?
.
Some Logic Probes have a Switch from TTL to CMOS switch , this switch must change the probes impedance from 120K TTL to 1K for CMOS right?
If the Logic Level is a HIGH state let's say +5 volts , putting .018 millivolts potential + 10M ohms probe loading it to ground + interference hum etc. = a voltage divider which load down the +5 volts to cause the input GATE to switch output states? isn't this right?