Continue to Site

Welcome to our site!

Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.

  • Welcome to our site! Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.

Current Circuits, DVM meter will short out when measuring on current circuits

Status
Not open for further replies.
So I can use an external power supply and inject a logic HIGH with the current limit set to MAX all the way ? I thought it was bad to do this
The maximum TTL input high current is between 40uA and 1mA depending on its voltage and it is designed to take this small amount of current. Then how can it be bad to do this?

So I can set the current limit to MAX on the external power supply and it will cause no harm or damage to the logic input TTL or CMOS?
No damage since the logic IC limits the input current but the max allowed input voltage (the supply voltage) must not be exceeded.

My Manager will take a jumper from ground to make a logic low when there is a logic high of +18 or +22 , he will take a jump and jump the input high +22 straight direct to ground. Is this good or bad? no bleeder resistor needed or a capacitor needed with the jumper to ground to make a logic low?
That makes no sense since the gate input is connected to another gate's output and you are shorting that active output which IS BAD. Outputs are not designed to be shorted.


No, It was the design of the circuit, the NOR GATE can input a +12 volts or a - 12 volts on the input
ABSOLUTELY NOT!
The NOR gate probably had a 0V and +12V supply. Then its input MUST NEVER be negative, it should be between 0V and +12V.
Maybe you are thinking about an opamp or comparator that can have a plus and minus 12V supply and inputs that can be the same.
 
my manager set the voltage , and put the current limit all the way to max. on the power supply, it must be 1 amp or more. thats why he said that the ttl or cmos will just draw as much as it can , but i think this is bad because its way past 1ma , its 1 amp and up on the ext. power supply.

how can u ground the output of a logic chip ttl or cmos that is a safe way?
 
how can u ground the output of a logic chip ttl or cmos that is a safe way?
I dont think you can without exceeding its absolute maximum rating.
 
Billy @#63,

This is the second question this morning where in essence your "manager" has told you to do something odd, and you are asking on this forum whether you should do it. (The other query to which I refer had to do with conformal coatings and potting compounds on PCB's.)

It could be that your manager is all mixed up and doesn't know what he is doing. It could also be that you didn't quite understand what your manager wants you to do. If you are unsure, ask your manager. Otherwise, it is probably a good idea to do what the manager tells you to do. Following advice that is contrary to what your manager wants you to do will likely not end well for you.

John
 
Billy @#63,

This is the second question this morning where in essence your "manager" has told you to do something odd, and you are asking on this forum whether you should do it. (The other query to which I refer had to do with conformal coatings and potting compounds on PCB's.)

It could be that your manager is all mixed up and doesn't know what he is doing. It could also be that you didn't quite understand what your manager wants you to do. If you are unsure, ask your manager. Otherwise, it is probably a good idea to do what the manager tells you to do. Following advice that is contrary to what your manager wants you to do will likely not end well for you.

John
Maybe he is trying to come off smarter than his manager, witch as we all know never ends well.
 
how can u ground the output of a logic chip ttl or cmos that is a safe way?
Graphs of CD4xxx Cmos logic ICs from Texas Instruments show "typical" output currents. With a 13V supply and the output is high but is shorted to ground, the typical current is 26mA which produces heating of 13V x 26mA= 338mW and it could be more. The maximum allowed heating of one output is listed on the datasheet as only 100mW so this IC is probably destroyed.
 

Attachments

  • CD4xxx output current.png
    CD4xxx output current.png
    29.3 KB · Views: 147
Hee, hee.
I joined a company where my boss was a "smart ass". He showed management that he was smarter than me. He made some serious technical mistakes and his incompetence got him fired. I showed management how easy I could fix his errors.
 
This is the second question this morning where in essence your "manager" has told you to do something odd, and you are asking on this forum whether you should do it

Yes, I have the high state voltage, but I don't know what to set the current limit on the external power supply?

My manager sets the current limit all the way to the max. which is in the amps , Isn't this going to damage the input or output of logic IC chips?

And How do you ground an output or input of a Logic IC chip , that is safe?

I'm trying to test one by one each logic IC chip to make sure it works, or to change the Logic level state to see if it changes the result

"typical" output currents. With a 13V supply and the output is high but is shorted to ground, the typical current is 26mA which produces heating of 13V x 26mA= 338mW and it could be more

The maximum allowed heating of one output

So shorting the output of an Logic IC that has a HIGH state will cause HEAT and will damage the Input of the next logic IC chip? it will exceed the maximum allowed on the output and damage the output and the input of the next IC chip?

When the logic level High state is higher than +5 volts. And the circuit designer wants a logic high to be +15, the current is higher on the outputs of the logic IC chips

Any reason why they want a higher current?
 
How do you ground an output or input of a Logic IC chip , that is safe?
DO NOT SHORT A CMOS LOGIC HIGH OUTPUT TO GROUND!

So shorting the output of an Logic IC that has a HIGH state will cause HEAT and will damage the Input of the next logic IC chip?
I am talking about destroying a Cmos output that has a datasheet that says its maximum allowed output heating for one output is 100mW.
Lookup the maximum allowed heating for the output of an old TTL IC yourself. I think it gets the hottest when its output is trying to go low but something shorts it to the +5V supply.

it will exceed the maximum allowed on the output and damage the output and the input of the next IC chip?
Why are you talking about damaging an input? It is the output that produces a high amount of heating when it is high and something shorts it to ground.

When the logic level High state is higher than +5 volts. And the circuit designer wants a logic high to be +15, the current is higher on the outputs of the logic IC chips
A Cmos logic IC uses Mosfets that HAVE NO INPUT CURRENT. Normally the output of a Cmos logic IC drives the input of another Cmos logic IC WITH NO CURRENT.

Any reason why they want a higher current?
They do not want. Instead the available current can quickly charge the capacitance of the pcb and the capacitance of the input it is driving.
The available current is higher when the supply voltage is higher because that is how Mosfets work. A higher gate voltage results in a higher output current.

Look at the graph I posted of Cmos output current again. With a 15V supply the shorted to ground output current is 26mA.
Then look at when it has a 5V supply. The shorted to ground output current is only 4mA.
Some manufacturers rate the maximum supply voltage at 22V. Then the shorted to ground output current is very high.
Guess how little is the output current when the supply is 3V.
 
DO NOT SHORT A CMOS LOGIC HIGH OUTPUT TO GROUND!

Why not? or how can I short a CMOS logic high output to a LOW state? that will be safe to do?

Can I short a TTL Logic High output to ground? or how can i do it safe?

I'm trying to change a TTL or CMOS high logic High to a logic LOW state, how can I do this please?

Instead the available current can quickly charge the capacitance of the pcb and the capacitance of the input it is driving.
The available current is higher when the supply voltage is higher because that is how Mosfets work.

So a high supply VCC voltage, will make a CMOS output have a Higher logic High state, which will cause the CMOS input to get charged and turn on faster?

So the CMOS timing is faster when you have a higher supply voltage , high logic levels?
 
Why not? or how can I short a CMOS logic high output to a LOW state? that will be safe to do?

Because when you short the logic high to ground, as AudioGuru pointed out and the data sheet supports the output current will go to max and the chip will self destruct. They get hot and die a horrible death. Therefore you can't short a high out to ground or low.

Can I short a TTL Logic High output to ground? or how can i do it safe?

Again you can't for the same reasons mentioned above.

I'm trying to change a TTL or CMOS high logic High to a logic LOW state, how can I do this please?

That you can do using an inverting buffer like for example a CD4049 which contains six inverting buffers on a single chip. Check out the CD4049 data sheet for CMOS or the 74hc04 data sheet for TTL.

So a high supply VCC voltage, will make a CMOS output have a Higher logic High state, which will cause the CMOS input to get charged and turn on faster?

So the CMOS timing is faster when you have a higher supply voltage , high logic levels?

Yes, but look at the data sheet for the particular IC and note the Transition Time for different voltages like 5, 10 and 15 volts and you will see what is going on.

Ron
 
Please ignore, my bad.

Ron
 
I'm trying to change a TTL or CMOS high logic High to a logic LOW state, how can I do this please?That you can do using an inverting buffer like for example a CD4049 which contains six inverting buffers on a single chip. Check out the CD4049 data sheet for CMOS or the 74hc04 data sheet for TTL.

No, I mean while doing "in circuit tests"

I'm trying to troubleshoot boards

So if a Logic IC chip I want to test and it has a HIGH output and I want to make it a LOW so I can see which logic chip is bad

I can't put a inverting buffer from the output to the input because the PCB board trace is this there , unless I cut the trace or lift up the logic chips output and the input of the next stage

Since I can't ground a Logic HIGH, how can I make it a LOW? can i just a voltage divided or a resistance in parallel to ground to cut the HIGH STATE voltage down to a low state threshold ?

Yes, but look at the data sheet for the particular IC and note the Transition Time for different voltages like 5, 10 and 15 volts and you will see what is going on.

Thanks I didn't know different logic Levels had different transition times faster and faster
 
my manager set the voltage , and put the current limit all the way to max. on the power supply, it must be 1 amp or more. thats why he said that the ttl or cmos will just draw as much as it can , but i think this is bad because its way past 1ma , its 1 amp and up on the ext. power supply.

Will 1 amp or more current limit on an external power be ok or safe to apply a Logic HIGH on a input for a TTL or CMOS?
 
Billy, the problem is that what you want to do as I read it is to force logic levels as a troubleshooting aid. I can only echo what AudioGuru and others have told you. There is no way to do what you want to do. The way to troubleshoot logic circuits, be they CMOS or TTL is using a scope or logic probe designed for the task. If when using a scope probe, especially on a CMOS circuit things become erratic then you are seeing the effects mentioned earlier. The probe should be coaxial cable and shielded right till the tip. If you try to force logic states you will end up adding more problems to a board that already has problems to begin with. Not a good troubleshooting or work habit.

Will 1 amp or more current limit on an external power be ok or safe to apply a Logic HIGH on a input for a TTL or CMOS?

NO! Unless that input is isolated from whatever is driving it.

Ron
 
the problem is that what you want to do as I read it is to force logic levels as a troubleshooting aid.

True I am, I guess there is no safe way to Force logic levels for TTL or CMOS inputs or outputs right?

Isn't a pull up resistor or a pull down resistor forcing logic levels?

NO! Unless that input is isolated from whatever is driving it.

What would isolated the input from what's driving it? a series resistor?

Because Mostly its direct from output pin to input pin , I don't see any pull up resistors, pull down resistors or a series resistors
 
the problem is that what you want to do as I read it is to force logic levels as a troubleshooting aid

I thought a Logic Pulsar can Force a Logic HIGH either TTL or CMOS to a pulsing signal right?
 
You can FORCE a logic low either its TTL or CMOS right?

But you have to use a Logic Pulsar when FORCING a logic high to a logic low for either a TTL or CMOS right?
 
I have heard about people using a logic probe that injects a very short-duration high current pulse into a logic output that feeds a logic input. Maybe the duration of the pulse is so short that it causes no damage but I have never used one and I doubt that the circuit will survive.

I troubleshooted (troubleshot?) logic by knowing what the output of a logic device should do and seeing it do it, then seeing if the logic IC it feeds does what it is supposed to do.
 
Status
Not open for further replies.

New Articles From Microcontroller Tips

Back
Top