Current Circuits, DVM meter will short out when measuring on current circuits

[Billy Mayo]

true, but isn't a pull up or pull down resistor forcing the logic state to go high or low?

 

[audioguru]

true, but isn't a pull up or pull down resistor forcing the logic state to go high or low?

No.
A normal logic output has one transistor that pulls up the output to make it high and it has another transistor that pulls down the output to make it low.
A circuit that needs an output pullup resistor is missing the transistor that other circuits have in their output to make it high, so a resistor is added from the output to the supply voltage to make it high when the transistor that pulls down the output is turned off.

I have never seen a circuit that needs a pull-down resistor but it would also be missing an output transistor.

When a pullup resistor pulls up or when a pull-down resistor pulls down then there is no high current and there is no heat. Because nothing is forced.

 

[audioguru]

Billy, Danny or Walters,
You keep getting inputs and outputs, TTL and Cmos and voltage and current mixed up. Because you do not understand anything.

 

[Billy Mayo]

Ok I get it, so when you force a logic HIGH to a logic low it increase the current very high which causes heat , so it damages the output transistor or mosfet

There is Logic gates that ADD the inputs and other Logic gates that Multiple the inputs

Those are the 2 different types of gates , eithers it adds the inputs or it multiple's the inputs

The Is truth tables that are Positive logic and others that are Negative Logic , but also you can take a positive logic and make it a negative logic be reversing the input state which changes the 1's and 0's, They call this negative logic also

Negative logic can be a Logic gate with a built in inverter on the output or inputs

Or Negative logic can be the positive truth table inverting the 1's and 0's

It gets really confusing for me, because a circuit designer will reverse the inputs and is using an ADD or OR gate but is using the positive truth table in a negative logic way , so i get mixed up when trying to test if these logic IC chips work or not

You got to remember you guys have got this second hand and it doesn't come easy to others

 

[Billy Mayo]

A circuit that needs an output pullup resistor is missing the transistor that other circuits have in their output to make it high, so a resistor is added from the output to the supply voltage to make it high when the transistor that pulls down the output is turned off.

I have never seen a circuit that needs a pull-down resistor but it would also be missing an output transistor.

Then its safe and ok to FORCE logic HIGHS to logic low for this types of logic gates right?

 

[Reloadron]

I thought a Logic Pulsar can Force a Logic HIGH either TTL or CMOS to a pulsing signal right?

There are logic pulsers that can be used as a troubleshooting aid. They are normally used to inject a signal to an input. There are also considerations. There are dozens of designs but let's look at one:

This may sound unusual but it is an unfortunate fact for digital circuits. If you take the simple case of a chip being clocked by the output of another, the clock line is being taken HIGH and then LOW during the operation of the circuit.
If you halt the circuit when the output is LOW, it will be very difficult to pull the line HIGH because it is being kept LOW by the output transistors of the driving chip.
These transistors have a certain amount of ability to keep the line LOW and this is called SINKING ABILITY. For TTL this can be as much as 45mA and for CMOS it will be up to about 25mA.
This means we would have to put a signal on the line and deliver more than 25 mA or 45mA to pull it HIGH.
The output transistors would not like this and having a capability of delivering 45mA to a circuit could prove to be damaging to lots of other parts of the circuit.
The LOGIC PULSER is built around a CD 4060, 14-stage divider chip which has an inbuilt oscillator. With the addition of 3 components, the oscillator drives a string of 14 flip flops. The first output pin comes from the output of the 4th flip flop and this means the clock frequency is divided by 8.
From there it is divided further and an output is available from flips flops 5 to 14 (except 12).
We have used Q4, Q5, Q6, Q8, Q10, Q12, and Q14 in our project and have found these to be the most suitable for producing pulse trains.
Each output of the chip is taken to a switch on the 8-way DIP switch package and then diode gated together to form an OR gate.
A transistor buffer passes the signal to the probe tip where a 1k resistor is present to prevent damage to the probe if probing a power rail etc.
By turning ON various combinations of switches, you can produce a wide range of tones from a whistle to a 1Hz pulse.
You can modulate the tone by tuning on additional switches to produce 'chirping' or 'phone-ringing' tones. This has the effect of delivering a HIGH pulse modulated by LOW pulses, at the same time.

That above quote was taken from here.

Take a good look at the circuit and note the probe uses a 1 K Ohm resistor. There is a good reason for that resistor. It prevents damage to the pulser circuit but also to the circuit under test. So a logic pulser really doesn't "force" anything. In some cases they can work and in others no.

This will always revert back to what AudioGuru mentions:

I troubleshooted (troubleshot?) logic by knowing what the output of a logic device should do and seeing it do it, then seeing if the logic IC it feeds does what it is supposed to do.

Ron

 

[large_ghostman]

Thats a nice circuit Ron, I have a logic probe, its handy for when i just want a quick yes no type answer. For most other thing's i use a scope, mainly because i like to see what is going on. I might have a go at building that circuit, could be handy now and then.
thanks

 

[Reloadron]

Thats a nice circuit Ron, I have a logic probe, its handy for when i just want a quick yes no type answer. For most other thing's i use a scope, mainly because i like to see what is going on. I might have a go at building that circuit, could be handy now and then.
thanks

Morning LG, I see you are enjoying the Christmas Holidays away from school.

That circuit was selected at random so I can't attest to how well it works. I used it as an example for Billy's questions.

Ron

 

[4pyros]

Then its safe and ok to FORCE logic HIGHS to logic low for this types of logic gates right?

You should never force an output to the other state on any chip you can blow the output and the chip will no longer work.
What you need to do is change the inputs to get the output to change and work your way down the series of chips.
Normal troubleshooting of logic gates starts at the inputs and works its way to the outputs until a fault is found.
You should never need to force an output if you use proper troubleshooting techniques.
This hole thing sounds to me like you did not have the proper (test fixtures) to test your boards!
No matter what forcing an output to the opposite state is a bad practice.
It will stress the output components and shorten its life if it does not kill it right away.
I think you and your manager and co workers need to learn proper troubleshooting techniques.
So lets stop talking about if its OK to force changes in outputs and talk about how to properly test your boards!

 

[audioguru]

Ok I get it, so when you force a logic HIGH to a logic low it increase the current very high which causes heat , so it damages the output transistor or mosfet

This thread is getting silly because Billy confuses a TTL gate with a COMPLETELY DIFFERENT Cmos gate.
Billy, PLEASE learn SOMETHING about TTL and Cmos logic. It is on their datasheets.
1) A TTL logic low maximum allowed output current is 16mA. Its current might be 60mA or more when it is forced high. So if you force it high then you will destroy it. A TTL logic high output usually has low current when it drives a TTL input high but its current will also be high and can destroy it when its output high is shorted to ground or is forced low. Then you can destroy a TTL output if you force it high OR if you force it low.

2) I showed a graph of Cmos available output low current at various supply voltages when its output has various loads. Its available output high current is shown on its datasheet to be about the same because it is symmetrical. Its available output current is high at high supply voltages which can destroy it if you force an output high OR force it low.

truth tables that are Positive logic and others that are Negative Logic.
It gets really confusing for me.

You got to remember you guys have got this second hand and it doesn't come easy to others

We simply learned the truth table of an OR gate and the different truth table for a NOR gate. The same for AND and NAND. why can't you learn this simple stuff?

There is another post that talks about an output pullup resistor. Sometimes an ordinary TTL logic gate that has an active high and active low output uses a pullup resistor to pull its output voltage higher than its normal 2.3V logic high voltage. Then shorting its logic high output to ground will destroy its output transistor that drives the output high. So you must learn which ICs have "open collector" outputs.

 

[Billy Mayo]

So a logic pulser really doesn't "force" anything.

So the Logic Pulser , does what to the HIGH logic state? is it riding ontop of the High Logic state? since it's not forcing

You should never force an output to the other state on any chip you can blow the output and the chip will no longer work.
What you need to do is change the inputs to get the output to change and work your way down the series of chips.
Normal troubleshooting of logic gates starts at the inputs and works its way to the outputs until a fault is found.
You should never need to force an output if you use proper troubleshooting techniques.

But the output pin that is driving the input pin is a direct connection , a direct trace

How can I force an input when there is a direct connection to the output pin that is driving it? I don't want to lift pins or cut traces

Then you can destroy a TTL output if you force it high OR if you force it low.

I don't get it

If the TTL output is LOW , why can't i force it to a HIGH logic state?

The TTL output is low close to zero voltage, what's the problem with me injecting a HIGH logic voltage level from an external power supply

It's the same thing as if the TTL output switch to a HIGH logic voltage level right?

Or are saying when I inject a HIGH logic voltage level onto the TTL output when the TTL output is low ( close to zero volts ) it will damage the TTL output even tho it's a LOW state close to zero volts?

Its available output current is high at high supply voltages which can destroy it if you force an output high OR force it low.

How can the current be HIGH when the output pin is LOW logic level? that doesn't make since

Are you saying when I inject a HIGH state on to the output pin it SINK's the current from the external power supply into the output pin and destroys it?

Sometimes an ordinary TTL logic gate that has an active high and active low output uses a pullup resistor to pull its output voltage higher than its normal 2.3V logic high voltage. Then shorting its logic high output to ground will destroy its output transistor that drives the output high.

You said that tho ordinary TTL logic gates don't have an output transistor, so how an i Destroy the output transistor when there isn't any? that's the point of the pull up resistor

 

[audioguru]

So the Logic Pulser , does what to the HIGH logic state? is it riding ontop of the High Logic state? since it's not forcing

I have never used a logic pulser to destroy the output of a logic IC.
If a logic output is high then some people use a logic pulser to force it low. Then the output transistor that is trying to keep the output high has a very high current in it and gets destroyed.

But the output pin that is driving the input pin is a direct connection , a direct trace

Then instead of forcing and destroying why don't you allow logic to make the tests? If you want an output to be low then use logic on its inputs so it makes its own output low. If you want an output to be high then use logic on its inputs so it makes its own output high.

How can I force an input when there is a direct connection to the output pin that is driving it? I don't want to lift pins or cut traces

Allow logic to make the tests.

If the TTL output is LOW , why can't i force it to a HIGH logic state?

Because then you overload and burn out the transistor that is trying to make the output stay low. Why don't you understand???

The TTL output is low close to zero voltage, what's the problem with me injecting a HIGH logic voltage level from an external power supply

because heating is voltage times current. The output is forced high so the output transistor has the full voltage across it instead of the normal very small voltage (logic low voltage) AND it has high current from the forcing. So the output transistor gets very hot and burns out.

It's the same thing as if the TTL output switch to a HIGH logic voltage level right?

The datasheet does not say what the maximum output current is when it is high and you force it low. It is probably a very high current.

Or are saying when I inject a HIGH logic voltage level onto the TTL output when the TTL output is low ( close to zero volts ) it will damage the TTL output even tho it's a LOW state close to zero volts?

You do not make sense. How can the output voltage be small when you are forcing it to be a high voltage?
Normally a TTL output can drive up to 10 TTL inputs low because its maximum allowed output low current is 16mA and the maximum input low current of a TTL input is 1.6mA. So if its current is 16mA and its output low voltage is 0.4V then the heating in the output transistor is 16mA x 0.4V= 0.0064 which is very low.
But when you force a TTL low output high, its current increases to maybe 60mA and the voltage across the output transistor is forced to maybe 5V so the heating is 60mA x 5V= 0.3W (47 times the normal heating) which is too high for the tiny output transistor in the IC.

How can the current be HIGH when the output pin is LOW logic level? that doesn't make since

The output current increases because when you force a low output to be high then the output transistor inside the IC is fighting to stay low but it is forced to be high. Logic low and logic high levels are voltages, not currents. A logic low output current of a TTL IC has a maximum allowed amount of 16mA.

Are you saying when I inject a HIGH state on to the output pin it SINK's the current from the external power supply into the output pin and destroys it?

You don't understand simple electronics and you don't understand ordinary English.
The output transistor trying to make the output voltage low is turned on hard.
You are forcing its output voltage to be a high voltage.
Then the current in the output transistor is a high amount of current.
Heating = voltage times current. A high amount of voltage times a high amount of current equals a very high amount of heating.

You said that tho ordinary TTL logic gates don't have an output transistor, so how an i Destroy the output transistor when there isn't any? that's the point of the pull up resistor

I said that ordinary TTL logic gates have TWO output transistors. One pulls up the output and the other pulls down the output.
I said that a few logic ICs need a pullup output resistor because THEY ARE MISSING a transistor that pulls up the output.

 

[KeepItSimpleStupid]

If an output is open collector, you can force that low.

The logic pulser is used to inject a small low-power pulse and the logic probe is designed to "catch it".

Billy must have a lot of "magic smoke" bottled up by now.

 

[4pyros]

I think you and your manager and co workers need to learn proper troubleshooting techniques.
So lets stop talking about if its OK to force changes in outputs and talk about how to properly test your boards!

What are the inputs and the expected outputs of your boards?

 

[Billy Mayo]

Why doesn't the logic pulsar overload the output? It doesn't raise the output current at all? Why is that?

a logic probe has a "pulse stretcher circuit", what does this do? An oscilloscope doesn't have a pulse stretcher circuit so what is it missing when measuring logic levels?

 

[audioguru]

I said, "allow logic to make the tests".

As I said about "forcing" on the other website forum a minute ago:
"There must be a documented condition of the circuit that causes the output of a logic gate to go high.
You know the truth table of the gate so you know that the inputs have that condition and you confirm it by measuring the inputs but the output of that gate does not go high.
Then either that gate is defective (probably) or the following gate's input is shorted to ground (unlikely). Forcing anything has not been used.
Which gate will you replace?"

 

[Billy Mayo]

Then instead of forcing and destroying why don't you allow logic to make the tests? If you want an output to be low then use logic on its inputs so it makes its own output low. If you want an output to be high then use logic on its inputs so it makes its own output high.

What do you mean allow logic? how can I do this? can you explain more about this allowing logic to make the test? what do u mean by this ?

 

[audioguru]

See my last post one minute ago.

 

[Billy Mayo]

You know the truth table of the gate so you know that the inputs have that condition and you confirm it by measuring the inputs but the output of that gate does not go high.
Then either that gate is defective (probably) or the following gate's input is shorted to ground (unlikely).

TRUE , this only works for Conbinatorial logic circuit not for Sequential circuits

Sequential circuits
1.) Have a clock Buss
2.) Have a Reset Buss
3.) Have a Enable Buss
4.) Has Feedback loops
5.) What else can you add please?

Combinatorial logic the output can always be predicted from the state of the logic inputs, sequential is where the present output depends on the previous state.

 

[Billy Mayo]

Sequential LOGIC & Troubleshooting is Different than Combinatorial Logic & Troubleshoot Circuit

Combinatorail Logic & Troubleshooting is :
1.) Check the VCC to ground on Each IC logic gate
2.) Check all the inputs and outputs and COMPARE them with the Truth tables

Sequential LOGIC & Troubleshooting is:
1.) Check the VCC to ground on Each IC logic gate
2.) Check all the inputs and outputs and COMPARE them with the Truth tables
3.) Check the clock buss
4.) Check the Enable Buss ( this is for Flip Flops , Counters ,
5.) Check the Reset buss ( this is for flip flops, counters,
6.) What else can you add please?