CPLD infomation

[Styx]

Hi,

I am in need of a bit of infomation. This is for a proffesional product but I am in need of some infomation since I am a Power electronics and Analogue person and one of my designs has got to full production standards thus space is a premium

The product is an IGBT gate drive and alot of the protection cct needs to be swept up in a CPLD/FPGA kind of device - no more Shmitt triggeres with RCD networks.
We have an approved list of components and the one that best meets what is required is the

GAL20V8.

my questions are:

1) I can either get this part (off the database) as a DIL or a LCC.
All I know about LCC is it is Leaded-Chip-Carrier, and a common format is the PLCC. However the part is only LCC (due to temp requirements PLCC are not allowed) does anyone have any other infomation - ie mounting of such

2) Can such devices be surface mounted to the board and JTAG programmed in-situe and any recommendations

any info would be great

 

[bmcculla]

https://www.electro-tech-online.com/custompdfs/2004/01/20v8.pdf

This is the data sheet.

It is available in PLCC or DIP(DIL) packages. Both are available in the industrial temperature range.

It doesn't look like it's in system programmable.

This part is a PLD rather than a CPLD. A CPLD is multiple PLD's in the same package with a programmable interconnect.

 

[Styx]

http://www.latticesemi.com/lit/docs/datasheets/pal_gal/20v8.pdf

This is the data sheet.

It is available in PLCC or DIP(DIL) packages. Both are available in the industrial temperature range.

It doesn't look like it's in system programmable.

This part is a PLD rather than a CPLD. A CPLD is multiple PLD's in the same package with a programmable interconnect.

chears, I cannot use PLCC, going to have to use LCC.
Thanks for the info on not in-system programme.

I'll track for a PLCC device and use PLCC for debug and code refining then mount the LCC device onto PLCC pads

thanks