One important aspect of switching transistors and LEDs always overlooked by designers is the current gain and ESR of each load in each stage.
Consider the 3 stages here for on current.
I1=4.3mA
I2=2.3mA
I3=10~20mA * 8 segments incl. "."
For off current Rload*Cload affects turn off speed and cuts leakage current in base.
Bigger LEDs have arrays like 2S2P or 2S3P etc so ESR increases with equivalent ratios as 2P/2S=1 and 3S2P =1.5x, 4S2P=2x ... Then ESR of the saturated diode, ESR [Ω]~ 1/Pd {+\-50%} where Pd=Vf*If
...(per segment) typically 50mW segments are 20Ω, 100mW are 10Ω, and strings 4S2P are 40Ω or 2x20Ω with 50mW per chip in 4S2P.
But lets assume the simplest case with 0ne diode per segment rated at 100mW then ESR=10Ω
Thus if one wanted to optimize saturation and turn off leakage/delay they would use the rated currents for Vsat.
In this case Ic/Ib=10, but best case transistors (ultra low Rce) have this ratio at 50...
Thus ideal drivers need only as a minimum...
I3=80mA (7 segments & dot)
I2=8mA
I1=0.8 mA
Each open collector needs up to 10% bypass current for next stage turnoff to cutoff Vbe, which is always shunted across Vbe.
Overlooking these important deign criteria will lead to di ming problems with more segments on and dim LEDs will all segments off.
Can you see what you can do better now?
Then if your are Mux'ing N digits at 1/N duty factor, you must increase drive current by same, xN.
Thus multiply all the above by 4. Then compute power loss in each collector R for sizing. Giving 350mA, 35mA and 3.5 mA with Rbe added for 10% bypass.
Then x2 if you intend to use 20mA segments vs 10mA !!!
If this leads to undesireable Pd, then choose wisely, transistors from Diodes Inc with low Rce and Ic/Ib=50 ratings, or consider FETs of suitable RdsOn, then each stage is chosen as LED Anode=10Ω/8 then RdsOn <=5% of LED ESR = <13 mΩ (1.25/20)