BCD counter's outputs frequency????

[amol.gulhane07]

suppose we have 4 bit counter operating on 10MHz frequency.Then
b3b2b1b0...
b0-5Mhz
b1=2.5Mhz
b2=1.25Mhz
and b3=0.625MHz

Now If by some logic circuit implementation I convert it into BCD counter then what will be the frequencies of b0,b1,b2,b3..???

 

[crutschow]

A BCD counter is just a binary counter that rolls over after count 9 back to 0 at count 10, so I leave the frequency calculation as an exercise for the reader.

 

[dr pepper]

Is this a homework question?

b0 to b2 will be the same.

b3 will be 1Mhz with a narrow duty cycle.

 

[amol.gulhane07]

@crutschow:Yeah,I Know that...
I even drew the timing diagram but how to determine frequency of b3 and b2

 

[amol.gulhane07]

@dr pepper:How you arrived at 1Mhz with a narrow duty cycle.Plz explain your method....

 

[Mike odom]

instead of counting to 16 and floping with 50% duty cycle, b3 only gets 2 counts and then flops to reset, so it will have a 20% hi and 80% low duty cycle.

frequency is 1/period. Count the time from a low to high transition to the next low to high transition, then divide 1 by this time (or high to low until next high to low).
Note: period time of 10MHz = .1μsec = 100nsec (50 hi, 50 low) ---> input clock
period time of 5 MHz = .2μsec = 200nsec (100 hi, 100 low) ---> outupt of b1, input clock to b2... etc

 

[dr pepper]

As mike said.

My head hurts.

 

[crutschow]

The easiest way to determine the frequency of the outputs is to draw the timing diagram of all the outputs.
From that it can be seen that the frequency of bo is 5MHz, b1 is 2MHz, b2 is 1MHz, and b3 is 1MHz. The duty-cycle of b2 and b3 are different from each other. Only b0 has a 50% duty-cycle.

 

[Mike odom]

The easiest way to determine the frequency of the outputs is to draw the timing diagram of all the outputs.
From that it can be seen that the frequency of bo is 5MHz, b1 is 2MHz, b2 is 1MHz, and b3 is 1MHz. The duty-cycle of b2 and b3 are different from each other. Only b0 has a 50% duty-cycle.

ok, half and half... drawing out the timing diagram:
b0 out yields 5MHz, 50% duty cycle
b1 out yields an fm signal that oscillates between 2.5MHz (for 1 cycle, 50% duty cycle) and then 1.66667MHz (for 1 cycle, 33% duty cycle), not 2MHz, but 2MHz average.
b2 is 1MHz with a duty cycle of 40%
b3 is 1MHz with a duty cycle of 20%

final answer

 

[crutschow]

ok, half and half... drawing out the timing diagram:
b0 out yields 5MHz, 50% duty cycle
b1 out yields an fm signal that oscillates between 2.5MHz (for 1 cycle, 50% duty cycle) and then 1.66667MHz (for 1 cycle, 33% duty cycle), not 2MHz, but 2MHz average.
b2 is 1MHz with a duty cycle of 40%
b3 is 1MHz with a duty cycle of 20%

I don't agree when you say the b1 output is not 2MHz. The output of b1 may not be symmetrical but it is 2 cycles for every 10 cycles of the clock which is 2MHz. A Hz is cycles per second. There is no mention of duty-cycle or symmetry in that definition. 1/period is also the frequency, but that's only for symmetrical waveforms.

 

[Mike odom]

I don't agree when you say the b1 output is not 2MHz. The output of b1 may not be symmetrical but it is 2 cycles for every 10 cycles of the clock which is 2MHz. A Hz is cycles per second. There is no mention of duty-cycle or symmetry in that definition. 1/period is also the frequency, but that's only for symmetrical waveforms.

by definition, 1/period = frequency; Look in any 1st year electronics class book. And so what you're saying is that since the outputs of b2 and b3 are not symmetrical, then 1/period would not = the frequency? Even though thei periods are 1usec? bull...
the output of b1 is a modualted 2.5Mhz to 1.66666MHz FM signal. Put it on a sprectum analyzer. I'll believe what that says.

 

[Mike odom]

I don't agree when you say the b1 output is not 2MHz. The output of b1 may not be symmetrical but it is 2 cycles for every 10 cycles of the clock which is 2MHz. A Hz is cycles per second. There is no mention of duty-cycle or symmetry in that definition. 1/period is also the frequency, but that's only for symmetrical waveforms.

cycles per second is not the definition of frequency, it is the units.
So what you're telling me is that your timing diagram goes out for a full second, and you counted all the cycles to get the 2 million and you're calling that 2MHz? No, you took the time period of 2 cycles, divided one by that, and multiplied by 2. You're telling me that you can't count pulses from low to high to next low to high (pulses counted are clock freq) and figure out what a frequency is? If your car revs it's engine for 1/2 second to 2500 rpm and goes back to idle at 800 rpm, then it was really only doing 1600 rpm total, since it wasn't doing 2500rpm for a full second???
oh wait, it's rpm, so by your definition we'd have to wait a minute before we know how fast the engine is running...

 

[crutschow]

If you want to bring a spectrum analyzer into it, then any digital signal will have harmonics and frequencies outside the fundamental, due to the square pulses and duty-cycle variations. If we are talking about the fundamental frequency then the output of b1 would be 2MHz on a spectrum analyzer with some sideband harmonics.

 

[Mike odom]

If you want to bring a spectrum analyzer into it, then any digital signal will have harmonics and frequencies outside the fundamental, due to the square pulses and duty-cycle variations. If we are talking about the fundamental frequency then the output of b1 would be 2MHz on a spectrum analyzer with some sideband harmonics.

no, the peaks would be at 2.5Mhz and 1.666667MHz, with harmonics, one of which would be 2MHz...

 

[Dean Huster]

The bottom line here is that a BCD counter's main function is to drive a decimal display. The ONLY output that can be guaranteed to be the counter's modulo is the final "D" output which, in the case of a ripple BCD counters such as the 7490, can be fed to the clock input of the next stage. Because of the forced resetting of the basic binary counter that's needed to make it a decade counter, none of the outputs are really clean square waves except of the first "A" output which is a simple divide-by-two counter. You can feed the divide-by-five section first and then feed the "D" output to the "A" input so that you can have a clean square wave at the final decade output BUT in this configuration, you cannot use it to drive a BCD-to-7-segment decoder/driver because the original BCD count sequence will be all screwed up. The final output will be the original divide-by-ten and yield a 50% duty-cycle square wave.

 

[amol.gulhane07]

@ MIke:Can you answer crutschow.
I am little bit confused after reading crutschow's reply.

 

[crutschow]

After further though I believe Mike is correct. A spectrum analyzer would see frequencies of 2.5MHz and 1.67 MHz from the b1 output, but the average digital frequency is 2MHz.

 

[Mike odom]

After further though I believe Mike is correct. A spectrum analyzer would see frequencies of 2.5MHz and 1.67 MHz from the b1 output, but the average digital frequency is 2MHz.

as I originally said in post #9... any digital device will give you 2MHz, a freq counter, a timer that counts pulses for any period in the msec range, will see the 'aliasing frequency' or average. I use that technique all the time, set one timer for a period, and count pulses on another, and if you set the period correctly, it automatically scales the data for you ... example, on an old speedometer, I had the magnetics set to give me one pulse per foot... if you count pulses for a second, you get 88 at 60mph (60mph = 88 ft/sec), however, if you count pulses for 682 msec (681.8), then you get a pulse count that = the mph, 60 for 60mph, 30 for 30mph, etc., no further scaling needs to be done. Not a big deal if you're programming in C, but if you're programming in assy and don't want to scale, then let the hardware scale it for you.

 

[Mike odom]

it should also be noted that the speedometer in the above case would give a readout of avg speed (over the 2/3 of a second interval)... for instaneous speed, you could count 1MHz clocks between the foot to foot pulses. This is what I did for the digital tachometer... I had a divide by n counter (number of cylinders), so the output was a two rpm period (I used a 10KHz clock), and yielded the instaneous rpm of the engine (or average for a two rotation period). Scaling and output was then done by a Look Up Table, no micro needed: all logic.