BCD 2 decimal (need help)

[Reloadron]

Then I agree with crutchow as there is no off the shelf easy solution. Crutchow also gave a few solutions but as to simple? There is no easy way.

You could start with a chip like the 74154 4 line to 16 line decoder and maybe work from there where one line of 16 out will go low based on the 4 bit address in but there would be a long way to go. Again, there is no easy way or single chip solution short of messing with a uC chip.

As to the displays what part number are they. The pin count means little by itself.


Ron

 

[crutschow]

I think you need some thing like this
**broken link removed**

That works fine for BCD signals. The difficulty is converting binary to BCD.

 

[crutschow]

You could start with a chip like the 74154 4 line to 16 line decoder and maybe work from there where one line of 16 out will go low based on the 4 bit address in but there would be a long way to go.

That's another possibility. Using that chip you could gate a 4-bit subtracter circuit to subtract 10 from the binary number when the count is 10 or greater. That number would go to the BCD-to-7 segment converter for the right digit. At the same time, you would change the left digit to a 1. Of course up to count 9 you just feed the signal directly to the BCD-to-7 segment converter for the right digit (or subtract 0, whichever is easier logic wise). That would work for a 4-bit number.

 

[jbeng]

These LED displays you have... are they multiplexed type? That is, do the two digits in the display share any pins?

 

[mbarazeen]

if you are interested in using few logic gates and get it done, see the attached one.

 

[crutschow]

Here's a 4-bit binary-to-BCD circuit that uses 3 ICs: an adder, a decoder, and a NAND gate. The encoder and NAND gate causes 6 to be added to any number above 9, and adds zero to numbers 0-9, for proper binary-to-BCD conversion.

(Note: The 7-segment displays shown have the BCD-to-7-segment decoder built in.)

The circuit could actually be simplified using a digital comparator such as the 4063 in place of the decoder and NAND gate, but I didn't have models for those in my simulator so am unable to prove its operation. The comparator would be wired so that any input above 9 would give a logic 1 output to B1 and B2 of the adder.