• Welcome to our site! Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.

about CD4016/66 e.c.

Not open for further replies.


Active Member
ran a sim. to get the apx. max. f range for CD4003/13
which to my surprise turned out is that the PN-latch performs better with not so homogenous elecronic switch
the other factors here is that paralleling gates makes it worse , also reversing the resistance graph (green , at left on fig.) to ascend towards Vdd won't work so good -- does anyone know the exact PN-latch (Pass Gate) circuit they use in CD4003 CD4013
or can comment about how uneven resistance graph results in better performance
XMF - Test - AA - 15.png
Last edited:


Well-Known Member
Most Helpful Member
The maximum frequency depends on the supply voltage and the load type.
Probably depends on what you are doing with the 40xx.


Active Member
it turned out the non homogeneous Pass Gate didn't pass misc. tests on a longer run - so i came out with a new one

i'm still interested about real 4003/13 realistic max clock speed ±5MHz


Not open for further replies.

EE World Online Articles