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Doubling frequency

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EngIntoHW

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Hi,

I ran into the following question:
Use Logic Gates in order to double the output frequency, as follows:
question-png.45942


The suggested solution was that:
answer-png.45943


What do you think of that solution?

In this case, Tout(HIGH) doesn't necessarily equal Tout(LOW), right?
Tout(HIGH) - duration of output being HIGH, at a single period.
Tout(LOW) - duration of output being LOW, at a single period.
 

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It will work.

But as you note, the output is not typically symmetrical. The high period will be approximately equal to the gate delay of the two "not" gates in series, so it could vary from a few ns to several tens of ns depending upon the type and speed of logic gate used.

You can increase this time by using addition pairs of inverters, or using a Schmitt trigger non-inverting gate with an RC delay in place of the inverters.
 
Thanks again guys.

I'd like to ask about additional issue please - Ripple Counter.

Is it correct to say that every cycle, the delay of a Ripple Counter grows by Tprop?
First cycle: delay = Tprop
Second cycle: delay = 2*Tprop
Third cycle: delay = 3*Tprop

Does it ever stop growing?
 
Thanks again guys.

I'd like to ask about additional issue please - Ripple Counter.

Is it correct to say that every cycle, the delay of a Ripple Counter grows by Tprop?
First cycle: delay = Tprop
Second cycle: delay = 2*Tprop
Third cycle: delay = 3*Tprop

Does it ever stop growing?
Why would it? It's a linear function of the number of stages.
 
Oh I see, thanks Carl! :)

So stage one would always have a delay of Tprop,
Stage two would always have a delay of 2*Tprop,
and so on.

Right?
 
Oh I see, thanks Carl! :)

So stage one would always have a delay of Tprop,
Stage two would always have a delay of 2*Tprop,
and so on.

Right?
That is correct.
 
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