Hi everyone,
I'm undertaking a project involving Analog to Digital Converter (ADC). From what i know, one way to implement this ADC in Verilog is by using a DAC and comparator. The DAC output and an analog input will be the inputs of the Comparator. The output of the comparator will then be fed into the ADC. Basically this method is based on the Successive Approximation. The problem with this design is that it is slow as it requires many comparisons. Is there any ADC with parallel(flash) comparisons where we can speed up the design?
The application note is Xilinx app155. What I want to know is that is there any other methods to implement the ADC in Verilog? Any further info on the different types, block diagrams, and how they work for ADCs are very much appreciated.
I've tried the tracking ADC, which uses the up/down counter, but it seems to be slower.
Thank you in advance.
I'm undertaking a project involving Analog to Digital Converter (ADC). From what i know, one way to implement this ADC in Verilog is by using a DAC and comparator. The DAC output and an analog input will be the inputs of the Comparator. The output of the comparator will then be fed into the ADC. Basically this method is based on the Successive Approximation. The problem with this design is that it is slow as it requires many comparisons. Is there any ADC with parallel(flash) comparisons where we can speed up the design?
The application note is Xilinx app155. What I want to know is that is there any other methods to implement the ADC in Verilog? Any further info on the different types, block diagrams, and how they work for ADCs are very much appreciated.
I've tried the tracking ADC, which uses the up/down counter, but it seems to be slower.
Thank you in advance.