Some great info, thanks. spec, I was asking about C1 and C2, but thanks for the info re gate capacitance. I am also aware that with paralleled devices the driver has to work twice as hard, I believe?
Eric, thanks for the revised simulation, again, appreciated!
Tony, I have just tied the shutdown pin 11 to ground with a 10k. Thanks. I also tried two off 470 Ohms resistors between the 5V pins 1, 4 and 14 and pins 2 and 6 and pin 5. With power applied and no signal I saw circa 5V on the pin 5 side of one resistor, and less than 1V on the pins 2 and 6 side of the other 470 Ohms resistor. Feeding a signal in saw noisy gate and drain waveforms compared to no pull ups. My issue with this is when a signal stops I often get a blown FET, sometimes, but very very rarely, I get it when a signal starts. The input waveform when looked at with a single shot on the scope, doesn't start clean, it "stutters" into life, but I don't have much if any control as it originates in my commercially made transceiver....
Ideas welcome, it's at times like this thermionic tubes seem appealing