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What this circuit does?

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leonel

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What´s the use of putting two transistor collectors shunted like the circuit in attachement! I don´t understand what this circuit does! Can anybody explain me? Thank you!
 

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leonel said:
What´s the use of putting two transistor collectors shunted like the circuit in attachement! I don´t understand what this circuit does! Can anybody explain me? Thank you!

It's a simple logic gate, either OR or NAND, depending on the logic polarity used.
 
leonel said:
What´s the use of putting two transistor collectors shunted like the circuit in attachement! I don´t understand what this circuit does! Can anybody explain me? Thank you!
It looks like a "wired OR gate".

The collectors of Q2 & Q3 are low when one or the other (or both) transistor is on.

It can only go high when both transistors are off.

As I can't see the rest of the circuit, I don't know what the objective is.

len
 
Here it is the all circuit...
Can you give me the circuits basic ideia?
Thank you...
 

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The letters are too small to read.

Can you convert it to a .gif ?

Or partition it into larger sections.

Len
 
Hello.
Here´s the *.gif. If you can´t read please say I´ll convert into different designs.
Thank you
 

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leonel said:
Hello.
Here´s the *.gif. If you can´t read please say I´ll convert into different designs.
Thank you

It doesn't help at all, because you've only converted the previous JPG to GIF, the JPG (as well as being far larger than a GIF) has already lost all the detail of the diagram, so converting the JPG to a GIF doesn't help at all. You need to start with a decent quality format, THEN convert it to GIF, any package should be able to generate a BMP (which is HUGE!), then convert that to GIF. I would also suggest you make the picture a bit bigger, even at good quality it's a bit small to see.
 
I agree with Nigel.

I draw circuits using PowerPoint and then convert them to .gif or .png

Len
 
New schema

Here´s a new schema. My voltage regulator is 18V, and, almost, my resistances values are 490K and 5K6.
Thank you.
Regards
Leonel Monteiro
 

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I put the resistances values... My transistor is BC547. If this helps... If it doesn't helps, that´s ok, i'll try other solution.
Regards
 

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Hi,
With the bases of a few transistors being fed from a 490k to 5.6k voltage divider, the input signal must be at least 57.5V for the transistors to begin to turn on. Where is such a high voltage coming from?
 
I agree with Audioguru. The "490k" resistors must be much lower.

I have extracted the essential elements of the circuit and have redrawn it in a recognisable configuration. I could not read the transistor numbers, so I labelled them myself.

Q1 and Q2 are configured as a Set/Reset Flip Flop. it is set and reset by transistors Q3 and Q4.

Assume that A and B are low, and Q1 is on, therefore Q2 is off. If a high is applied to A, Q4 is turned on, but no change will occur since Q1 is on. But if a high is applied to B (with A low), Q3 will turn on, this will turn Q1 off and so Q2 will turn on.

The FF is now in its other state Q2 on Q1 off. Now if a high is applied to A (with B low), Q4 will turn on, this will turn Q2 off and so Q1 will turn on.

The FF is now in its initial state.

Len
 

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Confused

In the image i have 4 input possibilities
0 0
0 1
1 0
1 1

What´s the state of my output in each possibility?
I don´t understand if for example A=1 and B=0. With A my output=0 and for B my output=1. There´s a conflict between each transistor! It´s possible having this configuration?
Please help me... i´m confused.
 

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Hi Leonel,
It's an OR gate with an inverted output. The output is low if A or B or both are high.
 
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