Way to charge a capacitor linear over time

[e-l-e-c-t-r-o]

Hi!

Could someone please refer to links of theory/application circuits regarding:

"How to charge a capacitor linearly over time, when the input signal fed into it is a DC voltage"

See a drawing description of what I am looking below.

I came across with general "solutions" such as a Voltage to Current converter before the cap, or a constant current source.
But none of them looks fully comprehent to me so i am asking for some theory background to clear up things a little bit.
A "dummy" circuit explaining the theory in practice would be cool too.

Help appreciated.

 

[Nigel Goodwin]

I don't see any relevence to a "voltage to current converter"?, but a constant current source is what you use to charge a capacitor in a linear fashion.

The reasoning behind it is VERY simple to understand, if you charge a capacitor then the voltage across it increases as it charges up (which is the whole point in doing it). So if you charge it via a simple resistor then the current through the resistor will decrease as the capacitor charges up, because the voltage across the resistor will decrease - simple ohms law!. It's this decreasing current which gives the capacitor charging it's characteristic curve - using a constant current obviously prevents this happening, as the current doesn't vary.

 

[e-l-e-c-t-r-o]

I don't see any relevence to a "voltage to current converter"?, but a constant current source is what you use to charge a capacitor in a linear fashion.

The reasoning behind it is VERY simple to understand, if you charge a capacitor then the voltage across it increases as it charges up (which is the whole point in doing it). So if you charge it via a simple resistor then the current through the resistor will decrease as the capacitor charges up, because the voltage across the resistor will decrease - simple ohms law!. It's this decreasing current which gives the capacitor charging it's characteristic curve - using a constant current obviously prevents this happening, as the current doesn't vary.

Now I am getting it.

So, in my in/out graph, what CCS is needed?
The input voltage range is 0-5 Volts, time in the graph is 10-20 ms.
All I have to do is place a constant current source before the cap to get that "red" line in the output stage?
Are there any CCS circuits out there for that?

thanks for the help, by the way.

 

[Optikon]

I don't see any relevence to a "voltage to current converter"?, but a constant current source is what you use to charge a capacitor in a linear fashion.

The reasoning behind it is VERY simple to understand, if you charge a capacitor then the voltage across it increases as it charges up (which is the whole point in doing it). So if you charge it via a simple resistor then the current through the resistor will decrease as the capacitor charges up, because the voltage across the resistor will decrease - simple ohms law!. It's this decreasing current which gives the capacitor charging it's characteristic curve - using a constant current obviously prevents this happening, as the current doesn't vary.

Now I am getting it.

So, in my in/out graph, what CCS is needed?
The input voltage range is 0-5 Volts, time in the graph is 10-20 ms.
All I have to do is place a constant current source before the cap to get that "red" line in the output stage?
Are there any CCS circuits out there for that?

thanks for the help, by the way.

This equation determines how long to charge with a constant current.

Ic = C*(dV/dt) where dV = 5V (0V to 5V say)
dt = 20ms or however long you want it to take
and C is you capacitance in Farads.

Plug these in and solve for Ic (the constant current needed)

 

[Roff]

The graph you posted is not the way a capacitor will respond to being charged by the current waveform you showed. Below is more representative of the voltage across the capacitor as a result of the applied current. I do think this is what your instructor is after. See the schematic I posted in your other thread.

 

[e-l-e-c-t-r-o]

The graph you posted is not the way a capacitor will respond to being charged by the current waveform you showed. Below is more representative of the voltage across the capacitor as a result of the applied current. I do think this is what your instructor is after. See the schematic I posted in your other thread.

MANY MANY thanks to all of you that helps.

It seems more clear now and that is probably what my tutor is asking.

But now I have one more query:

In the graph the output from the capacitor will go up until it reached the supply voltage right?

How could I make it stop (and become constant) or start to discharge the capacitor at the voltage value that the initial input signal stops?See graph.

Opinions?

 

[Roff]

This is getting complicated. It can be done, but why do you want to do it? We frequently get questions here that are too far into the details. When the real goal is revealed, another approach turns out to be better.

 

[e-l-e-c-t-r-o]

This is getting complicated. It can be done, but why do you want to do it? We frequently get questions here that are too far into the details. When the real goal is revealed, another approach turns out to be better.

oh, the goal was finding reference of a linear charging capacitor schematic.
Goal achieved.Much appreciated.

But the schematic with the output you draw got me really curious on something:

The capacitor charges linearly, but since the initial input remains constant for ever after some time (it gets at the maximum voltage, but it is a constant dc level),

the linear charging capacitor charges up to the supply voltage.

So, a very important information seems to be lost there:
The maximum level of dc voltage of the initial input, no matter what value it will have, the output voltage will always reach the supply voltage (in different times, of course).

I assumed there has to be a way to link input with output voltage levels,
a way to force the output not to increase beyond the level of the initial input.

I just assumed this is trivial piece of info to be lost.I am wrong?

:?:
May be it is not that difficult, a differential amplifier could provide the base of comparison,and what if we could find a way to force the capacitor to stop charging?

hooo, it starts to get interesting!!

Thank you for your responses.

 

[Roff]

This is getting complicated. It can be done, but why do you want to do it? We frequently get questions here that are too far into the details. When the real goal is revealed, another approach turns out to be better.

oh, the goal was finding reference of a linear charging capacitor schematic.
Goal achieved.Much appreciated.

But the schematic with the output you draw got me really curious on something:

The capacitor charges linearly, but since the initial input remains constant for ever after some time (it gets at the maximum voltage, but it is a constant dc level),

the linear charging capacitor charges up to the supply voltage.

So, a very important information seems to be lost there:
The maximum level of dc voltage of the initial input, no matter what value it will have, the output voltage will always reach the supply voltage (in different times, of course).

I assumed there has to be a way to link input with output voltage levels,
a way to force the output not to increase beyond the level of the initial input.

I just assumed this is trivial piece of info to be lost.I am wrong?

:?:
May be it is not that difficult, a differential amplifier could provide the base of comparison,and what if we could find a way to force the capacitor to stop charging?

hooo, it starts to get interesting!!

Thank you for your responses.

Well, no information is lost unless you are trying to make a slew rate limiter. If you really want to clamp at the control voltage, you are correct in thinking that a diff amp is involved (an op amp is the simplest diff amp you could use). Here's a way to do it.
BTW, keep in mind that we have built in no provisions for discharging the capacitor once it is charged. With the circuit I originally posted, the voltage can only increase until it reaches the voltage compliance limit of the V-I converter (considerably less than the supply voltage).

 

[e-l-e-c-t-r-o]

All I was qurious was whether with the circuit you suggested, we have an output level that does not relate to the level of the input maximum point.
Cause if the capacitor is charging as long as the input remains constant (i.e for eternity) at its higher value, then the capacitor will continue to charge (not forever, until it reaches the converter's limits).
This is bad, right?

I don't think the slew rate limiter is what my tutor is asking, although I think that clamp generator perform a such a role, right?

I got it about the inability to discharge.I am curious to whether this ability could be added.
Can u suggest a theory frame for what I am curious to as if it could be built?

All I suggested is a way to "force" the capacitor to charge up to the point of the initial input's maximum voltage.
I just think that a clpam generator should have this feature.

:roll:

 

[Roff]

All I was qurious was whether with the circuit you suggested, we have an output level that does not relate to the level of the input maximum point.
Cause if the capacitor is charging as long as the input remains constant (i.e for eternity) at its higher value, then the capacitor will continue to charge (not forever, until it reaches the converter's limits).
This is bad, right?

It's not bad - or good. A current source charging a capacitor is not a useful circuit unless it gets discharged sometime, for some reason.

I don't think the slew rate limiter is what my tutor is asking, although I think that clamp generator perform a such a role, right?

What is your tutor asking? Please answer this.
The clamp will cause the cap charging to stop at the control voltage level, but the slope of the output will be a function of the control voltage. That's not the way a slew rate limiter works.

I got it about the inability to discharge.I am curious to whether this ability could be added.
Can u suggest a theory frame for what I am curious to as if it could be built?

You can simply discharge the cap with a switch to GND (or some other voltage, and with or without a series resistor). The switch can be an NPN, a MOSFET, a JFET, etc. You could get more elaborate and discharge it through a current sink, constant or programmable. There obviously has to be some event to trigger this, be it an external event or an output from a comparator.

All I suggested is a way to "force" the capacitor to charge up to the point of the initial input's maximum voltage.
I just think that a clpam generator should have this feature.

:roll:

clpam? I'm assuming this is means "clamp". The "clamp" generator is just the last block diagram I posted. The controlled current source is not part of a clamp generator.
I see no point in stopping the ramp when it reaches the control voltage. Why does this seem so important to you? Suppose the control voltage was 0 to 100 volts (which we could easily do). What do you do now?
If you are looking to make this do something useful, you could make a voltage-controlled oscillator by connecting this circuit (possibly with some modifications) to a 555 timer chip or some other sort of Schmitt trigger.

 

[spuffock]

Try "integrator". An op amp is connected with + input grounded, capacitor between - input and output, voltage signal applied via resistor to - input.
Op amp will keep - input at virtual ground so input current will be constant for a constant input voltage. Cap charging will be linear until op amp output gets near rail. Hope this is what's needed

 

[Roff]

Try "integrator". An op amp is connected with + input grounded, capacitor between - input and output, voltage signal applied via resistor to - input.
Op amp will keep - input at virtual ground so input current will be constant for a constant input voltage. Cap charging will be linear until op amp output gets near rail. Hope this is what's needed

Yeah, I've been thinking about mentioning an integrator, but I got the impression (perhaps erroneous) that he needed to be able to drive a grounded load. An integrator certainly simplifies the V-I conversion process.

 

[e-l-e-c-t-r-o]

All I was qurious was whether with the circuit you suggested, we have an output level that does not relate to the level of the input maximum point.
Cause if the capacitor is charging as long as the input remains constant (i.e for eternity) at its higher value, then the capacitor will continue to charge (not forever, until it reaches the converter's limits).
This is bad, right?

It's not bad - or good. A current source charging a capacitor is not a useful circuit unless it gets discharged sometime, for some reason.

I don't think the slew rate limiter is what my tutor is asking, although I think that clamp generator perform a such a role, right?

What is your tutor asking? Please answer this.
The clamp will cause the cap charging to stop at the control voltage level, but the slope of the output will be a function of the control voltage. That's not the way a slew rate limiter works.

I got it about the inability to discharge.I am curious to whether this ability could be added.
Can u suggest a theory frame for what I am curious to as if it could be built?

You can simply discharge the cap with a switch to GND (or some other voltage, and with or without a series resistor). The switch can be an NPN, a MOSFET, a JFET, etc. You could get more elaborate and discharge it through a current sink, constant or programmable. There obviously has to be some event to trigger this, be it an external event or an output from a comparator.

All I suggested is a way to "force" the capacitor to charge up to the point of the initial input's maximum voltage.
I just think that a clpam generator should have this feature.

:roll:

clpam? I'm assuming this is means "clamp". The "clamp" generator is just the last block diagram I posted. The controlled current source is not part of a clamp generator.
I see no point in stopping the ramp when it reaches the control voltage. Why does this seem so important to you? Suppose the control voltage was 0 to 100 volts (which we could easily do). What do you do now?
If you are looking to make this do something useful, you could make a voltage-controlled oscillator by connecting this circuit (possibly with some modifications) to a 555 timer chip or some other sort of Schmitt trigger.

"What is your tutor asking? Please answer this."

Let's see:

Tutor's assignment (this were my notes from the class):

"Find in the Internet a common voltage to current converter like the XTR 110.
Read about its operation and potential roles it has.
Take extra care in analyzing its operation in peak indicators and (linear) Digital to analog converters.
To give u a hint, look for circuits where a capacitor is forced to charge linear over time.(maybe in the exams-Linear DACs)

After you do that, search for a non-conventional VCc.

For instance, something not working in the normal 4-20mV range, or not being part of a current loop.

Then analyze its operation and role.

Then compare and contrast these different kind of VCcs; how successfull are in what they do, how frequent you can see them in applications etc.

The whole point of the exercise is to get into practical details and potential problems that these circuits might face.
To know them inside out.(Focus into linear capacitor charging!)

So, you'd better dig into some potential problems and see what's going on there.
(Extra marks for those providing solutions!).

Applications relative to the exercise: Clamp generators, voltage controlled oscilators etc."

Does this answer something?

"It's not bad - or good. A current source charging a capacitor is not a useful circuit unless it gets discharged sometime, for some reason. "

It is bad when it is useless, I meant.So my question on how to discharge the capacitor needed an answer for a reason.Good.

"The clamp will cause the cap charging to stop at the control voltage level, but the slope of the output will be a function of the control voltage. That's not the way a slew rate limiter works."

That's fine with me, and one of the reasons I said my tutor is not asking for a slew rate limiter.We agree, I guess.

"You can simply discharge the cap with a switch to GND (or some other voltage, and with or without a series resistor). The switch can be an NPN, a MOSFET, a JFET, etc. You could get more elaborate and discharge it through a current sink, constant or programmable. There obviously has to be some event to trigger this, be it an external event or an output from a comparator.

If you are looking to make this do something useful, you could make a voltage-controlled oscillator by connecting this circuit (possibly with some modifications) to a 555 timer chip or some other sort of Schmitt trigger."

I did a little search one that, found a link:
**broken link removed**

in page 5 paragraph 3, it says something like the one I am asking, right?

If that's it, could you suggest possible refinements for me?At least we could discuss about it.
I think with all that I shall be getting an "A" in the exercise!Thanks :shock:

This circuit in the pdf relates to a VCO producing a "sawtooth" waveform.
The thing is that the input is a variable voltage level (used to control the pitch), and that variability has to be included into the sawtooth waveform as well.
SOO, the max voltage level of input is a VITAL info in that application, right?

A general schematic for my application could be like that, right?
Or maybe it needs too much refinement?

Last but not least, what is with the "integrator"?What exactly does he mean?I am a little lost on that one

Thank you all for your help, by the way. :!:

 

[Roff]

Below is a VCO that is very similar to the ones in the MIDI synth you referenced. I have included output waveforms which are a result of a zero to 5 volt ramp on the control voltage pin.
Note that the capacitor voltage never gets clamped. It does get discharged.
I don't want to try to describe 555 theory here. See Tony van Roon's .
I have tried to give some circuit descriptions on the schematic. Note that there are actually two VCCS's in the circuit (the current mirror is also one). I did it this way (as opposed to the synth ckt) so that the input voltage could be referenced to GND. There are other ways to do this.
I may explain the integrator later.

 

[spuffock]

The voltage controlled current source in Ron H's vco will provide the calculated current less the base current of the transistor. Using a FET will eliminate this. Of course, you will need enough voltage to turn the FET on..
Sorry, it's nit-picking day..

 

[Optikon]

oops...disregard this..

 

[Roff]

The voltage controlled current source in Ron H's vco will provide the calculated current less the base current of the transistor. Using a FET will eliminate this. Of course, you will need enough voltage to turn the FET on..
Sorry, it's nit-picking day..

Actually, in the text with the schematic, I said essentially that:

If you needed it to be precise, you would need to use precision resistors, replace the BJTs with small geometry MOSFETs, and use precision op amps. "

But nit-picking is still good. It must be - I do it all the time. :roll:

 

[e-l-e-c-t-r-o]

The VCO posted is very intuitive 8)

Nice example, I tried it on in Workbench.

I think now I get the whole thing with linear charging capacitors.

One final question:

Below there is the in/out diagram workbench gives.
Plus what to I am CURIOUS of whether it can be done (and how of course)

A brief description:

Give into a Voltage to current converter (the one u suggested) the input signal (blue), charge a capacitor linear BUT
when the capacitor's voltage reaches (actually tries to surpass) the voltage level of the input signal,
SOMETHING (maybe a differential amplifier with a few extra components :idea: )
forces the INPUT signal to revert to zero and the capacitor to discharge :shock:

Extremely curious to as it can be done and how, looking forward to your comments and theory explanation. :roll:

This could mean A+ mark.

Thank you so very much, you have been more than helpfull.

 

[JimB]

Give into a Voltage to current converter (the one u suggested) the input signal (blue), charge a capacitor linear BUT
when the capacitor's voltage reaches (actually tries to surpass) the voltage level of the input signal,
SOMETHING (maybe a differential amplifier with a few extra components :idea: )
forces the INPUT signal to revert to zero and the capacitor to discharge :shock:

Use Google and search for "dual slope integration". This is a technique used in A to D converters, digital voltmeters etc.
The unknown voltage is used to charge a capacitor, then a known current is used to discharge the capacitor, the time taken for the discharge can then be used to determine the voltage.
(a bad description, but it is late and although I feel helpfull, my brain has had enough!).

JimB