I read an article from Texas Instruments on the derivation of the effective tolerance of a voltage divider on the output of a regulator:
https://www.ti.com/lit/an/slva423/slva423.pdf
I need to know if this derivation would apply to my situation.
I have a 5 V reference from a (TI) REF5050. On that node, I want to put a voltage divider to ground. Vout will be 4.8 V.
Can I use the derivation in the TI article to determine the effective tolerance at Vout of my divider or does that derivation only apply to the top side of the divider when used with a regulator?
Cliff notes quote from the article:
https://www.ti.com/lit/an/slva423/slva423.pdf
I need to know if this derivation would apply to my situation.
I have a 5 V reference from a (TI) REF5050. On that node, I want to put a voltage divider to ground. Vout will be 4.8 V.
Can I use the derivation in the TI article to determine the effective tolerance at Vout of my divider or does that derivation only apply to the top side of the divider when used with a regulator?
Cliff notes quote from the article:
The maximum error is actually inversely proportional to the divider ratio and decreases linearly as the power supply's output voltage approaches its internal reference value.