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Type "D" Flip-Flop Question

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I have looked at ten or twenty different data sheets for the 4013 Dual "D" flip-flop and none of them show EXACTLY how they work. Specifically, I need to know how "set" and "reset" are accomplished. Every data sheet I looked at just shows a strange symbol I'm not familiar with. I tried following the truth tables, but I get confused too easily. Is there a complete NAND gate equivalent circuit I could follow? Anyone have anything else that will help? Thanks.


New Member
Check out the truth table in this datasheet: http://www.fairchildsemi.com/ds/CD/CD4013BC.pdf

If Set is asserted (high) and Reset is not, then Q is high and Qnot is low.
If Reset is asserted and Set is not, then Q is low and Qnot is high.

If both Set and Reset are asserted, both Q and Qnot will be high.

Set and Reset work independently of the other inputs, i.e. they don't care what's on the Data pin and they don't need the Clock.


New Member
logic ICs

:D hi captainkirksdog,

I know how you feel towards this logic ics, I have been thru that and reading some of the datasheets of these ics can inform us but not educate us who are not electronic engineers.

Here is my suggestion, try looking at books that basically describe the functions of AND - OR - INVERTER - NAND - NOR - EX OR - EX NOR gates. That will give you a clearer understanding of those chips.

Another suggestion, try expermenting with a timer ic like the famous 555, it can be used as a monosatable & astable circuit, Schmitt trigger, comparator, detectors, voltage controlled oscillator, tone burst generator or even use it as a touch switch just to name a few.

hope this can help :D
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